Circuit Description
Fig.5-7 ECP Hardware Handshaking Timing (reverse)
1. The host request a reverse channel transfer by setting nINIT low.
2. The peripheral signals that it is OK to proceed by setting PE low.
3. The peripheral places data on the data lines and indicates a data cycle by setting BUSY high.
4. Peripheral asserts nACK low to indicate valid data.
5. Host acknowledges by setting nAUTOFD high.
6. Peripheral sets nACK high. This is the edge that should be used to clock the data into the host.
7. Host sets nAUTOFD low to indicate that it is ready for the next byte.
8. The cycle repeats, but this time it is a command cycle because BUSY is low.
5-6
Samsung Electronics
Содержание MSYS 5150
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Страница 203: ...Schematic Diagrams 12 14 Samsung Electronics 12 6 OPE Circuit Diagram IF Active HIGH Logic IF Active LOW Logic ...
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Страница 210: ... Samsung Electronics Co Ltd Mar 1999 Printed in Korea P N JC68 00097A Rev 1 00 ELECTRONICS ...