Rockwell RFX144V24-S23, Руководство дизайнера

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RFX144V24-S23 and RFX96V24-S23 Modem Designer’s Guide
1070 3-1
3. SOFTWARE INTERFACE
Modem functions are implemented in firmware executing in the MDP DSP.
3.1 INTERFACE MEMORY
The DSP communicates with the host processor by means of a dual-port, interface memory. The interface memory in the
DSP contains thirty-two 8-bit registers, labeled register 00 through 1F (Figure 3-1). Each register can be read from, or
written into, by both the host and the DSP.
The host can control modem operation by writing control bits to DSP interface memory and writing parameter values to DSP
RAM through interface memory. The host can monitor modem operation by reading status bits from DSP interface memory
and reading parameter values from DSP RAM through interface memory.
Writing parameter values to DSP RAM and reading parameter values from DSP RAM is described in Section 4.
3.1.1 Interface Memory Map
A memory map of the 32 addressable registers in the modem is shown in Figure 3-1. These 8-bit registers may be read or
written during any host read or write cycle. In order to operate on a single bit or a group of bits in a register, the host must
read a register and then mask out unwanted data. When writing a single bit or group of bits in a register, the host must
perform a read-modify-write operation. That is, the entire register (8-bits) must first be read, the necessary bits must be set
or reset without altering the other register bits, then the byte (8-bits) containing both the unaltered and modified bits must be
written back into the interface memory.
3.1.2 Interface Memory Bit Definitions
The interface memory bits are defined in Table 3-1. The interface memory bits are referred to using the format Z:Q. The
register number is designated by Z (00 through 1F), and the bit number by Q (0 through 7, 0 = least significant bit).