Rockwell RFX144V24-S23, Руководство дизайнера

Страница: 3 / 198

RFX144V24-S23 and RFX96V24-S23 Modem Designer’s Guide
1070 iii
Table of Contents
1. INTRODUCTION ............................................................................................................................................. 1-1
1.1 SUMMARY ................................................................................................................................................ 1-1
1.2 FEATURES................................................................................................................................................ 1-3
1.3 TECHNICAL SPECIFICATIONS ................................................................................................................. 1-5
2. HARDWARE INTERFACE SIGNALS .............................................................................................................. 2-1
3. SOFTWARE INTERFACE ............................................................................................................................... 3-1
3.1 INTERFACE MEMORY .............................................................................................................................. 3-1
3.1.1 Interface Memory Map ..................................................................................................................... 3-1
3.1.2 Interface Memory Bit Definitions ....................................................................................................... 3-1
3.2 SOFTWARE INTERFACE CONSIDERATIONS ........................................................................................ 3-19
3.2.1 Parallel Data Transfer..................................................................................................................... 3-19
3.2.2 Programmable Interrupt Feature..................................................................................................... 3-19
3.2.3 8-Bit Audio Mode Operation............................................................................................................ 3-21
3.2.4 16-Bit Audio Mode Operation.......................................................................................................... 3-21
3.2.5 DTMF Receiver .............................................................................................................................. 3-22
3.2.6 FSK 7E Flag Detector..................................................................................................................... 3-23
3.2.7 V.23 Mode Operation ..................................................................................................................... 3-24
3.2.8 Caller ID Mode Operation ............................................................................................................... 3-24
3.2.9 High Speed Timing ......................................................................................................................... 3-26
3.2.10 Power-On/Reset DSP Test Mode and Crystal Selection ................................................................ 3-29
4. DSP RAM ACCESS ........................................................................................................................................ 4-1
4.1 INTERFACE MEMORY ACCESS TO DSP RAM......................................................................................... 4-1
4.1.1 Host Programmable Data ................................................................................................................. 4-1
4.1.2 Host DSP RAM Read and Write Procedures ..................................................................................... 4-1
4.1.3 DSP RAM Read Procedure............................................................................................................... 4-1
4.1.4 DSP RAM Write Procedure............................................................................................................... 4-2
4.2 DIAGNOSTIC DATA SCALING .................................................................................................................. 4-6
5. HDLC FRAMING............................................................................................................................................. 5-1
5.1 HDLC FRAMES ......................................................................................................................................... 5-1
5.1.1 Frame Fields .................................................................................................................................... 5-1
5.1.2 Frame Abortion, Frame Idle, And Time Fill ........................................................................................ 5-2
5.2 IMPLEMENTATION ................................................................................................................................... 5-3
5.2.1 Mode Selection................................................................................................................................. 5-5
5.2.2 Transmission and Reception Rate .................................................................................................... 5-5
5.2.3 Transmitter and Receiver Initialization............................................................................................... 5-5
5.2.4 Flag Transmission and Reception ..................................................................................................... 5-6
5.2.5 Information Field Transmission and Reception .................................................................................. 5-6
5.2.6 FCS and Ending Flag Transmission and Reception........................................................................... 5-7
5.2.7 Underrun and Overrun Conditions .................................................................................................... 5-8
5.2.8 Transmit Mode Control ..................................................................................................................... 5-8
5.3 EXAMPLE APPLICATION .......................................................................................................................... 5-8
6. TONE DETECTOR FILTER TUNING............................................................................................................... 6-1
6.1 PROGRAMMABLE TONE DETECTORS .................................................................................................... 6-1
6.1.1 Computation of Tone Detector Coefficients ....................................................................................... 6-1
6.1.2 Energy Averaging Filter .................................................................................................................... 6-3
6.1.3 Filter Coefficients.............................................................................................................................. 6-7
6.2 TONE DETECTORS IN VOICE CODEC, AUDIO CODEC
AND
AUDIO MODES........................................... 6-7