Section 29 List of Registers
Rev. 1.00 Mar. 12, 2008 Page 1074 of 1178
REJ09B0403-0100
29.1
Register Addresses (Address Order)
The data bus width indicates the numbers of bits by which the register is accessed. The number of
access states indicates the number of states based on the specified reference clock.
Note: Access to undefined or reserved addresses is prohibited. Since operation or continued
operation is not guaranteed when these registers are accessed, do not attempt such access.
Register Name
Abbreviation
Number
of Bits
Address Module
Data
Bus
Width
Number
of Access
States
EtherC mode register
ECMR
32
H'F900
EtherC
16
8
EtherC status register
ECSR
32
H'F904
EtherC
16
8
EtherC interrupt permission register
ECSIPR
32
H'F908
EtherC
16
8
PHY interface register
PIR
32
H'F90C
EtherC
16
8
MAC address high register
MAHR
32
H'F910
EtherC
16
8
MAC address low register
MALR
32
H'F914
EtherC
16
8
Receive frame length register
RFLR
32
H'F918
EtherC
16
8
PHY status register
PSR
32
H'F91C
EtherC
16
8
Transmit retry over counter register
TROCR
32
H'F920
EtherC
16
8
Delayed collision detect counter
register
CDCR
32
H'F924
EtherC
16
8
Lost carrier counter register
LCCR
32
H'F928
EtherC
16
8
Carrier not detect counter register
CNDCR
32
H'F92C
EtherC
16
8
CRC error frame counter register
CEFCR
32
H'F934
EtherC
16
8
Frame receive error counter register
FRECR
32
H'F938
EtherC
16
8
Too-short frame receive counter
register
TSFRCR
32
H'F93C
EtherC
16
8
Too-long frame receive counter
register
TLFRCR
32
H'F940
EtherC
16
8
Residual-bit frame counter register
RFCR
32
H'F944
EtherC
16
8
Multicast address frame counter
register
MAFCR
32
H'F948
EtherC
16
8
IPG register
IPGR
32
H'F954
EtherC
16
8
Automatic PAUSE frame set register
APR
32
H'F958
EtherC
16
8
Manual PAUSE frame set register
MPR
32
H'F95C
EtherC
16
8
Содержание H8S Family
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Страница 70: ...Section 1 Overview Rev 1 00 Mar 12 2008 Page 22 of 1178 REJ09B0403 0100...
Страница 108: ...Section 2 CPU Rev 1 00 Mar 12 2008 Page 60 of 1178 REJ09B0403 0100...
Страница 116: ...Section 3 MCU Operating Modes Rev 1 00 Mar 12 2008 Page 68 of 1178 REJ09B0403 0100...
Страница 152: ...Section 5 Interrupt Controller Rev 1 00 Mar 12 2008 Page 104 of 1178 REJ09B0403 0100...
Страница 206: ...Section 6 Bus Controller BSC Rev 1 00 Mar 12 2008 Page 158 of 1178 REJ09B0403 0100...
Страница 420: ...Section 9 14 Bit PWM Timer PWMX Rev 1 00 Mar 12 2008 Page 372 of 1178 REJ09B0403 0100...
Страница 476: ...Section 12 Watchdog Timer WDT Rev 1 00 Mar 12 2008 Page 428 of 1178 REJ09B0403 0100...
Страница 552: ...Section 14 CRC Operation Circuit CRC Rev 1 00 Mar 12 2008 Page 504 of 1178 REJ09B0403 0100...
Страница 588: ...Section 15 Serial Communication Interface with FIFO SCIF Rev 1 00 Mar 12 2008 Page 540 of 1178 REJ09B0403 0100...
Страница 632: ...Section 17 Synchronous Serial Communication Unit SSU Rev 1 00 Mar 12 2008 Page 584 of 1178 REJ09B0403 0100...
Страница 712: ...Section 18 I2 C Bus Interface IIC Rev 1 00 Mar 12 2008 Page 664 of 1178 REJ09B0403 0100...
Страница 804: ...Section 19 LPC Interface LPC Rev 1 00 Mar 12 2008 Page 756 of 1178 REJ09B0403 0100...
Страница 838: ...Section 20 Ethernet Controller EtherC Rev 1 00 Mar 12 2008 Page 790 of 1178 REJ09B0403 0100...
Страница 964: ...Section 24 RAM Rev 1 00 Mar 12 2008 Page 916 of 1178 REJ09B0403 0100...
Страница 1066: ...Section 25 Flash Memory Rev 1 00 Mar 12 2008 Page 1018 of 1178 REJ09B0403 0100...
Страница 1098: ...Section 26 Boundary Scan JTAG Rev 1 00 Mar 12 2008 Page 1050 of 1178 REJ09B0403 0100...
Страница 1168: ...Section 30 Platform Environment Control Interface PECI Rev 1 00 Mar 12 2008 Page 1120 of 1178 REJ09B0403 0100...
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Страница 1230: ...H8S 2472 Group H8S 2462 Group Hardware Manual...