210
High-speed Counters
Section 5-2
5-1-6
External Interrupts
An external interrupt task performs interrupt processing in the CPU Unit in
response to an input from a CJ-series Special I/O Unit or CPU Bus Unit con-
nected to the CPU Unit. The reception of these interrupts is always enabled.
External interrupts require no special settings in the CPU Unit, although an
interrupt task with the specified number must be included in the user program.
Example: External interrupt from a CJ1W-CT021-V1 High-speed Counter Unit
Note
When the same interrupt number is used for both an external interrupt task
(task 0 to 255), and scheduled interrupt task (task 2) or high-speed counter
interrupt task (0 to 255), the task will be executed for both the external inter-
rupt condition and the other interrupt condition. As a general rule, do not use
the same interrupt number for different interrupt conditions.
5-2
High-speed Counters
5-2-1
Overview
• A rotary encoder can be connected to a built-in input to produce a high-
speed pulse input.
• High-speed interrupt processing can be performed when the high-speed
counter PV matches a target value or is within a target value range.
• The PRV(881) instruction can be used to measure the input pulse fre-
quency (one input only).
• The high-speed counter PVs can be maintained or refreshed.
• The High-speed Counter Gate Bit can be turned ON/OFF from the ladder
program to select whether the high-speed counter PVs will be maintained
or refreshed.
• Any one of the following input signals can be selected as the counter input
mode.
Response Frequencies for 24 VDC Inputs to High-speed Counters 0 to 3
in X/XA CPU Units or High-speed Counters 2 and 3 in Y CPU Units:
• Differential phase inputs (4x): 50 kHz
• Pulse + direction inputs: 100 kHz
• Up/Down pulse inputs: 100 kHz
• Increment pulse inputs: 100 kHz
Response Frequencies for Line Driver Inputs to High-speed Counters 0
and 1 in Y CPU Units:
• Differential phase inputs (4x): 500 kHz
• Pulse + direction inputs: 1 MHz
• Up/Down pulse inputs: 1 MHz
• Increment pulse inputs: 1 MHz
CP1H CPU Unit
High-speed Counter Unit
Interrupt
Содержание Sysmac CP1H
Страница 2: ......
Страница 3: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised October 2014...
Страница 4: ...iv...
Страница 10: ...x...
Страница 18: ...xviii...
Страница 22: ...xxii...
Страница 34: ...xxxiv Conformance to EC Directives 6...
Страница 76: ...42 Function Blocks Section 1 5...
Страница 176: ...142 CP series Expansion I O Unit Wiring Section 3 6...
Страница 372: ...338 Analog I O XA CPU Units Section 5 5...
Страница 578: ...544 Trouble Shooting Section 8 7...
Страница 622: ...588 Sample Application Section 9 12 Network Settings Network Tab Network Settings Driver Tab...
Страница 668: ...634 Standard Models Appendix A...
Страница 669: ...635 Appendix B Dimensions Diagrams X XA and Y CPU Units 90 100 110 140 150 8 85 Four 4 5 dia holes...
Страница 744: ...710 Auxiliary Area Allocations by Address Appendix D...
Страница 771: ...737 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Страница 772: ...738 Connections to Serial Communications Option Boards Appendix F...
Страница 800: ...766 Specifications for External Power Supply Expansion Appendix H...
Страница 806: ...772 Index W Work Area 165 work bits 165 work words 165 write protection 379...
Страница 808: ...774 Revision History...
Страница 809: ......