NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
FXTH87ERM
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© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
75 / 183
Effect
on CCR
Source Form
Operation
Description
V H I N Z C
Address
Mode
Opcode Operand
Bus
Cycles
[1]
BNE
rel
Branch if Not
Equal
Branch if (Z) = 0
– – – – – –
rel
26 rr
3
BPL
rel
Branch if Plus
Branch if (N) = 0
– – – – – –
rel
2A rr
3
BRA
rel
Branch Always
No Test
– – – – – –
rel
20 rr
3
BRCLR
n,opr8a,rel
Branch if Bit n in
Memory Clear
Branch if (Mn) = 0
– – – – – Þ
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
01
03
05
07
09
0B
0D
0F
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
5
5
5
5
5
5
5
5
BRN
rel
Branch Never
Uses 3 Bus Cycles
– – – – – –
rel
21 rr
3
BRSET
n,opr8a,
rel
Branch if Bit n in
Memory Set
Branch if (Mn) = 1
– – – – – Þ
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
00
02
04
06
08
0A
0C
0E
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
5
5
5
5
5
5
5
5
BSET
n,opr8a
Set Bit n in
Memory
Mn ← 1
– – – – – –
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
10
12
14
16
18
1A
1C
1E
dd
dd
dd
dd
dd
dd
dd
dd
5
5
5
5
5
5
5
5
BSR
rel
Branch to
Subroutine
PC ← (PC) +
0x0002
push (PCL); SP ←
(SP) – 0x0001
push (PCH); SP ←
(SP) – 0x0001
PC ← (PC) +
rel
– – – – – –
rel
AD rr
5
CBEQ
opr8a,rel
CBEQA
#opr8i,rel
CBEQX
#opr8i,rel
CBEQ
oprx8,X+,
rel
CBEQ ,X+,
rel
CBEQ
oprx8,SP,
rel
Compare and
Branch if Equal
Branch if (A) = (M)
Branch if (A) = (M)
Branch if (X) = (M)
Branch if (A) = (M)
Branch if (A) = (M)
Branch if (A) = (M)
– – – – – –
DIR
IMM
IMM
IX1+
IX+
SP1
31
41
51
61
71
9E61
dd rr
ii rr
ii rr
ff rr
rr ff
rr
5
4
4
5
5
6
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