NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
124 / 183
Field
Description
3:0
LFONTM
[3:0]
LF Sampling ON Time Select — These read/write control bits select the length of time that the LFR input
detector is turned on at the beginning of each sampling interval set by the LFSTM bits. This ON time is
the net sampling time with any initialization time (maximum of 2 ms) included in the OFF time prior to the
sample ON time (see
Figure 36
). If a signal is successfully detected, the length of time the detector remains
ON depends on the operating mode. In carrier detect mode (CARMOD = 1) the detector will be turned off
early if the evaluation of the carrier signal is completed before the end of the scheduled ON time. In data
receive mode (CARMOD = 0) the detector will remain ON until the end of the message, an error is detected
or timeout occurrence. Reset forces the LFONTM bits to 0:0:0.
0000 1 LFO clock cycle (1 millisecond nominal)
0001 2 LFO clock cycle (2 milliseconds nominal)
0010 4 LFO clock cycle (4 milliseconds nominal)
0011 8 LFO clock cycle (8 milliseconds nominal)
0100 16 LFO clock cycle (16 milliseconds nominal)
0101 32 LFO clock cycle (32 milliseconds nominal)
0110 64 LFO clock cycle (64 milliseconds nominal)
0111 128 LFO clock cycle (128 milliseconds nominal)
1000 256 LFO clock cycle (256 milliseconds nominal)
1001 512 LFO clock cycle (512 milliseconds nominal)
1010 1024 LFO clock cycles (1024 milliseconds nominal)
1011 1024 LFO clock cycles (1024 milliseconds nominal)
11xx 1024 LFO clock cycles (1024 milliseconds nominal)
Note:
The LFONTM selected time must be less than the LFSTM selected time, otherwise the Continuously
ON mode is present.
LFR detector active
LFONTM
LFSTM
Power up
settling time
Power up
settling time
LFONTM*
time segments not to scale
*LFONTM times will differ between LF wakeup and LF datagram reception.
tDEC
LF searching for
SYNC pattern
aaa-028029
Figure 36. LF detector sampling timing
14.17.3 LF control register 3 (LFCTL3)
LFCTL3 contains the control bits for the LF sampling interval and the minimum required
carrier detection time when using the carrier detect mode.
Table 110. LFR control register 3 (LFCTL3) (address ($0022)
Bit
7
6
5
4
3
2
1
0
R
LFDO
W
TOGMOD
SYNC[1:0]
LFCDTM[3:0]
Reset
—
0
0
1
0
0
0
0
= Reserved
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