NXP Semiconductors FXTH870 D Series, Руководство пользователя

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FXTH870xD
Sensors
Freescale Semiconductor, Inc.
93
12.4 Input Amplifier
The LFR module receives LF modulated signals through a dedicated differential pair of inputs which is connected to an external
coil. The enable control (LFEN) allows the user to enable the LF input depending on the application requirements. The SENS[1:0]
bits in the LFCTL1 register allows the user to select one of two input sensitivity thresholds which determines the signal level
required before the input carrier will be detected. The sensitivity setting is used during carrier detection but does not affect
reception after the carrier has been detected. When the CARMOD bit is cleared, after a carrier with sufficient amplitude,
frequency and duration has been detected the output stage of the amplifier is turned on to allow data reception.
12.5 LFR Data Mode States
The modes of operation the LFR state machine will sequence as shown in Figure 66 .
12.6 Carrier Detect
Carrier detection includes a check for a certain number of edges on a signal that is greater than the input sensitivity threshold.
During the check for carrier edges, only the 1kHz low frequency oscillator (LFO) clock source is running so power consumption
remains very low.
During carrier detection the incoming signal is amplified and passed through a sensitivity threshold comparator. The SENS[1:0]
bits in the LFCTL1 register selects two levels of sensitivity and determines the signal amplitude that is needed to allow edges to
be seen at the output of the sensitivity threshold comparator. When a carrier is above this threshold, a block is powered on and
validates the carrier. This frequency and duration check function can be disabled by clearing the VALEN bit. If VALEN is set, the
block checks for the carrier duration and the carrier frequency. The time needed to validate a carrier is programmed by the
LFCDTM register. The carrier frequency should be 125 kHz. If the signal above the threshold is not within the frequency range
or not present during enough time, then the carrier will not be validated and the validation block will turn off.
If no carrier signal is validated within the on time of the LFR, the state machine returns to the off state and the alternating cycle
of on time and off time continues. Carrier edge counts start at zero when a new on time begins.
In the data mode (CARMOD = 0), if the required number of carrier edges are detected before the end of the ON time, the LFR
will remain ON to complete the reception of a message telegram.
In the carrier detect mode (CARMOD = 1) there is no need to enable other LFR circuitry to evaluate any other message
components after the required number of carrier edges are detected. One or several consecutive carriers can be validated by
this process before the LFCDF flag is set. The LFCC control bits are used to program the number of consecutive ON times where
a complete carrier validation is needed before interrupting the MCU. In this case, the LFCDF flag is set and, provided the LFCDIE
interrupt enable is also set, an interrupt is issued to wake the MCU. In carrier detect mode, the LFCDIE control bit should always
be set because the intended purpose of the carrier detect mode is to wake the MCU when a carrier is detected. When LFCDF is
set, the LFR waits until it is cleared before it continues the alternating cycle of on time and off time, starting with an off time.
In data mode, when a carrier is detected the averaging filter is powered on and the LFR continues to the next state to look for the
rest of a message telegram; and the LFR module will search for valid SYNC word (with length programmed through the SYNC
bits in the LFCTL3 register depending on preamble type). If the external LF field is not a TPMS frame, a timeout will turn off the
LFR module. This timeout can be program through TIMOUT bit the LFCTL4 register.