FXTH870xD
Sensors
Freescale Semiconductor, Inc.
105
12.17.5 LFR Status Register (LFS, LPAGE = 0)
LFS contains the data ready status flags. It is only accessible when the LPAGE bit is clear.
$0024
Bit 7
6
5
4
3
2
1
Bit 0
R
LFDRF
LFERF
LFCDF
LFIDF
LFOVF
LFEOMF
LPSM
0
W
LFIAK
Reset:
0
0
0
0
0
0
1
0
= Reserved
Figure 80. LFR Status Register (LFS, LPAGE = 0)
Table 63. LFS Register Field Descriptions
Field
Description
7
LFDRF
LF Data Ready Flag
— This read-only status flag is set when a complete byte of data has been received by the LFR. An interrupt
is sent to the MCU if the LFDRIE bit is set. Clear LFDRF by writing a one to the LFIAK bit or reading the LFDATA register. LFDRF
is also cleared by reset.
0
No new data in LFDATA register.
1
A new byte of data has been received and can be read from the LFDATA register.
6
LFERF
LF Receive Error Flag
— In data receive mode, this read-only status flag is set when a non-standard bit time is detected in the
Manchester data mode. Any received data bits before the error occurs are placed in the data buffer. In carrier detect mode, this
read-only status flag is not used and remains clear. An interrupt is sent to the MCU if the LFERIE bit is set. Clear LFERF by
writing a one to the LFIAK bit. LFERF is also cleared by reset.
0
Normal operation.
1
Error detected in the Manchester data mode.
5
LFCDF
LF Carrier Pulse Detect Flag
— In carrier detect mode, this read-only status flag is set when the number of consecutive carrier
validations set by the LFCC bits in is reached. Note that the LFCC function is not working if TOGMOD = 1. Clear LFCDF by writing
a one to the LFIAK bit. LFCDF is also cleared by reset.
0
Normal operation.
1
Carrier detection has occurred.
4
LFIDF
LF ID Detect Flag
— In data receive mode, this read-only status flag is set when the received ID matches the stored value. This
interrupt can be generated even if no data bits follow the ID. An interrupt is sent to the MCU if the LFIDIE bit is set. Clear LFIDF
by writing a one to the LFIAK bit. LFIDF is also cleared by reset.
0
Normal operation.
1
wakeup ID has been detected.
3
LFOVF
LF Receive Data Overflow Flag
— In data receive mode, this read-only status flag is set when a complete byte of data has
been received and written into the LFDATA register, but the previously received byte was not read from LFDATA register yet.
This indicates that the MCU has lost the previously received data byte. In carrier detect mode, this read-only status flag is not
used and remains cleared. No separate interrupt is generated by this specific flag bit because the LFDRF flag would serve that
purpose. Clear LFOVF by writing a one to the LFIAK bit. LFOVF is also cleared by reset.
0
Normal operation.
1
Previous data over-written before MCU read it.
2
LFEOMF
LF Receive Data EOM Flag
— In data receive mode, this read-only status flag is set when a complete byte of data has been
received and written into the LFDATA register and an end-of-message Manchester encoding error occurs. In carrier detect mode,
this read-only status flag is not used and remains clear. No interrupt is generated by this flag bit because the LFERF flag would
serve that purpose. Clear LFEOMF by writing a one to the LFIAK bit. LFEOMF is also cleared by reset.
0
No EOM detected.
1
EOM detected.
1
LPSM
Low Power Sniff Mode
— This bit used to activate the low power consumption during SNIFF mode. It saves approximately 1
A with a trade-off of an additional 200
s in transition from carrier to data mode. LPSM is set by reset.
0
Low time transition from carrier to data mode
1
Low consumption during sniff mode
0
LFIAK
LF Interrupt Acknowledge
— Writing a one to the LFIAK bit clears the LFDRF, LFERF, LFCDF, LFIDF, LFOVF and LFEOMF
flag bits. When a one is written to the LFIAK, it is automatically cleared at the next positive edge of the MCU bus clock. Then,
reading the LFIAK bit is allowed but will always return zero. Writing a zero the LFIAK bit has no effect. Reset has no effect on
this bit.
0
No effect.
1
Clears the LFDRF, LFERF, LFCDF, LFIDF, LFOVF and LFEOMF flag bits.
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