MS51
Dec. 17, 2019
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6.12.1 ADC Operation
Before ADC operation, the ADC circuit should be enabled by setting ADCEN (ADCCON1.0). This
makes ADC circuit active. It consume extra power. Once ADC is not used, clearing ADCEN to turn off
ADC circuit saves power.
The ADC analog input pin should be specially considered. ADCHS[2:0] are channel selection bits that
control which channel is connected to the sample and hold circuit. User needs to configure selected
ADC input pins as input-only (high impedance) mode via respective bits in PxMn registers. This
configuration disconnects the digital output circuit of each selected ADC input pin. But the digital input
circuit still works. Digital input may cause the input buffer to induce leakage current. To disable the
digital input buffer, the respective bits in AINDIDS should be set. Configuration above makes selected
ADC analog input pins pure analog inputs to allow external feeding of the analog voltage signals. Also,
the ADC clock rate needs to be considered carefully. The ADC maximum clock frequency is listed in
ADC Analog Electrical Characteristics. Clock above the maximum clock frequency degrades ADC
performance unpredictably.
An A/D conversion is initiated by setting the ADCS bit (ADCCON0.6). When the conversion is
complete, the hardware will clear ADCS automatically, set ADCF (ADCCON0.7) and generate an
interrupt if enabled. The new conversion result will also be stored in ADCRH (most significant 8 bits)
and ADCRL (least significant 4 bits). The 12-bit ADC result value is
REF
AIN
V
V
4095
.
By the way, digital circuitry inside and outside the device generates noise which might affect the
accuracy of ADC measurements. If conversion accuracy is critical, the noise level can be reduced by
applying the following techniques:
1. Keep analog signal paths as short as possible. Make sure to run analog signals tracks well away
from high-speed digital tracks.
2. Place the device in Idle mode during a conversion.
3. If any ADC_CHn pins are used as digital outputs, it is essential that these do not switch while a
conversion is in progress.
6.12.2
ADC Conversion Triggered by External Source
Besides setting ADCS via software, the MS51 is enhanced by supporting hardware triggering method
to start an A/D conversion. If ADCEX (ADCCON1.1) is set, edges or period points on selected PWM
channel or edges of STADC pin will automatically trigger an A/D conversion. (The hardware trigger
also sets ADCS by hardware.)
The effective condition is selected by ETGSEL (ADCCON0[5:4]) and ETGTYP (ADCCON1[3:2]). A
trigger delay can also be inserted between external trigger point and A/D conversion. The external
trigging ADC hardware with controllable trigger delay makes the MS51 feasible for high performance
motor control. Note that during ADC is busy in converting (ADCS = 1), any conversion triggered by
software or hardware will be ignored and there is no warning presented.
