MS51
Dec. 17, 2019
Page
154
of 316
Rev 1.01
M
S51
SE
RIES
TE
CHNICA
L REF
ERE
N
CE MA
NU
A
L
RCTRIM0
–High Speed Internal Oscillator 16 MHz Trim 0 (TA protected)
7
6
5
4
3
2
1
0
HIRCTRIM[8:1]
R/W
Address: 84H
Reset value: 16 MHz HIRC value
RCTRIM1
–High Speed Internal Oscillator 16 MHz Trim 1 (TA protected)
7
6
5
4
3
2
1
0
-
-
-
HIRC24
-
-
-
HIRCTRIM.0
-
-
-
R/W
-
-
-
R/W
Address: 85H
Reset value: 16 MHz HIRC value
Note
:
since defaut RCTRIM0 and RCTRIM1 value is base on 16MHz, if base on this value then modify
HIRC24(RCTIM1.4) to enable 24MHz HIRC mode, the real HIRC deviation will more than 1%.
Suggest reload the 24MHz HIRC value from after UID, and check value bit 4 to confirm this value is
suit for 24MHz application.
System Clock Switching
6.2.1.3
The MS51 supports clock source switching on-the-fly by controlling CKSWT and CKEN registers via
software. It provides a wide flexibility in application. Note that these SFRs are writing TA protected for
precaution. With this clock source control, the clock source can be switched between the external
clock source and the internal oscillator, even between the high and low-speed internal oscillator.
However, during clock source switching, the device requires some amount of warm-up period for an
original disabled clock source. Therefore, use should follow steps below to ensure a complete clock
source switching. User can enable the target clock source by writing proper value into CKEN register,
wait for the clock source stable by polling its status bit in CKSWT register, and switch to the target
clock source by changing OSC[1:0] (CKSWT[2:1]). After these step, the clock source switching is
successful and then user can also disable the original clock source if power consumption is
concerned. Note that if not following the steps above, the hardware will take certain actions to deal
with such illegal operations as follows.
1. If user tries to disable the current clock source by changing CKEN value, the device will ignore this
action. The system clock will remain the original one and CKEN will remain the original value.
2. If user tries to switch the system clock source to a disabled one by changing OSC[1:0] value,
OSC[1:0] value will be updated right away. But the system clock will remain the original one and
CKSWTF flag will be set by hardware.
3. Once user switches the system clock source to an enabled but still instable one, the hardware will
wait for stabilization of the target clock source and then switch to it in the background. During this
waiting period, the device will continue executing the program with the original clock source and
CKSWTF will be set as 1. After the stable flag of the target clock source (see CKSWT[7:3]) is set and
the clock source switches successfully, CKSWTF will be cleared as 0 automatically by hardware.
