NEC mPD178053, Руководство пользователя

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CHAPTER 3 CPU ARCHITECTURE
User’s Manual U15104EJ2V0UD
Table 3-4. Special Function Registers (2/3)
Address Special Function Register (SFR) Name Symbol R/W Bit Units for Manipulation After Reset
1 Bit 8 Bits 16 Bits
FF6EH Serial I/O shift register 30 SIO30 R/W — — Undefined
FF6FH Serial operating mode register 30 CSIM30 — 00H
FF70H 8-bit compare register 52 CR52 W — — Undefined
FF71H 8-bit compare register 53 CR53 — —
FF72H 8-bit timer counter 52 TM523 TM52 R — 00H
FF73H 8-bit timer counter 53 TM53 —
FF74H Timer clock select register 52 TCL52 R/W — —
FF75H 8-bit timer mode control register 52 TMC52 —
FF77H Timer clock select register 53 TLC53 — —
FF78H 8-bit timer mode control register 53 TMC53 —
FF80H 8-bit compare register 50 CR50 — — Undefined
FF81H 8-bit compare register 51 CR51 — —
FF82H 8-bit timer counter 50 TM501 TM50 R — 00H
FF83H 8-bit timer counter 51 TM51 —
FF84H Timer clock select register 50 TCL50 R/W — —
FF85H 8-bit timer mode control register 50 TMC50 —
FF87H Timer clock select register 51 TCL51 — —
FF88H 8-bit timer mode control register 51 TMC51 —
FFA0H PLL mode select register PLLMD —
FFA1H PLL reference mode register PLLRF — 0FH
FFA2H PLL unlock F/F judge register PLLUL R&Reset — Retained
Note 1
FFA3H PLL data transfer register PLLNS W — 00H
FFA6H PLL data registers PLL data register L PLLR PLLRL R/W Undefined
FFA7H PLL data register H PLLRH
FFA8H PLL data register 0 PLLR0 —
FFA9H IF counter mode select register IFCMD — 00H
FFAAH DTS system clock select register DTSCK — 00H
Note 2
FFABH IF counter gate judge register IFCJG R — 00H
FFACH IF counter control register IFCCR W —
FFAEH IF counter register IFCR IFCRL R — —
FFAFH IFCRH — —
Notes 1. Undefined by power-on clear reset only.
2. Though the initial value of the DTS system clock select register (DTSCK) is 00H, be sure to set this register
to 01H before using it.
Caution Do not access addresses to which no SFR is assigned.