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11 DATA COMMUNICATION USING THE BIDIRECTIONAL PROTOCOL
11.3 Processing when Simultaneous Transmission Performed During Full-Duplex
Communication
This section explains the processing when simultaneous transmissions occur in full-
duplex communication.
11.3.1 Processing when simultaneous transmissions occur
This section explains the processing performed by the C24 when the external device and
the C24 transmit at the same time during data communications using the bidirectional
protocol.
Since the external device and the C24 do not transmit at the same time during half-duplex
communications (refer to User's Manual (Application)), this section does not have to be
read.
When an external device and the C24 transmit at the same time, the C24 processing
depends on the setting.
"Various_Control_Specification" screen "For designation of transmission control"
"Receive data" or "Transmission data"
The values, set to "Receive data" and "Transmission data" are stored in the following
areas of the buffer memory.
Simultaneous transmission data valid/invalid designation (addresses: 9B
H
/13B
H
)
The C24 communication data processing for each setting is described in Section
11.3.2
C24 processing contents
Setting contents
with GX Works2
Value set to buffer
memory
(Address 9B
H
/13B
H
)
Message transmit processing
Message receive processing
Transmission data: Valid
Receive data: Valid
0000
H
Waits to receive the response message (1)-2)
while checking time-out after data
transmission (1)-1) is complete.
Posts normal end or abnormal end according
to whether or not the CPU module received a
response message through the buffer
memory.
Transmits a response message (2)-2)
after data reception (2)-1) is complete.
Posts the receive data and receive result
to the CPU module through the buffer
memory.
Transmission data: Invalid
Receive data: Valid
0100
H
Posts a simultaneous transmission error to the
CPU module through the buffer memory after
data transmission (1)-1).
Does not wait for a response massage (1)-2) in
reply to data transmission (1)-1).
Transmits a response message (2)-2)
after data reception (2)-1) is complete.
Posts the receive data and receive result
to the CPU module through the buffer
memory.
Transmission data: Valid
Receive data: Invalid
0001
H
Waits to receive the response message (1)-2)
while checking time-out after data
transmission (1)-1) is complete.
Posts normal end or abnormal end according to
whether or not the CPU module received a
response message through the buffer memory.
Ignores data reception (2)-1) and
discards the received data.
Does not transmit a response message
(2)-2).
Does not inform the CPU module that
data was received.
Transmission data: Invalid
Receive data: Invalid
0101
H
Posts a simultaneous transmission error to the
CPU module through the buffer memory after
data transmission (1)-1).
Does not wait to a response massage (1)-2) in
reply to data transmission (1)-1).
Ignored data reception (2)-1) and
discards the receive data.
Does not transmit a response message
(2)-2).
Does not inform the CPU module that
data was received.
(n)-m) is the number showing the correspondence with the messages in the illustration shown in Section 11.3.2
Содержание MELSEC LJ71C24
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Страница 105: ...7 30 7 30 7 SETTINGS FOR THE C24 MEMO...
Страница 391: ...App 62 App 62 APPENDIXES 3 Refresh parameter setting In Refresh Parameter set the following network parameters...
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