12
12-41
Rev.1.0
SERIAL I/O
12.4 Receive Operation in CSIO Mode
12.4.2 Starting CSIO Reception
When all of the following receive conditions are met after you finished initialization, the serial I/O
starts receive operation.
(1) Receive conditions when CSIO mode internal clock is selected
•
The SIO Receive Control Register's receive enable bit is set to 1.
•
Transmit conditions are met. (Refer to Section 12.3.3, "Starting CSIO Transmission.")
(2) Receive conditions when CSIO mode external clock is selected
•
The SIO Receive Control Register's receive enable bit is set to 1.
•
Transmit conditions are met. (Refer to Section 12.3.3, "Starting CSIO Transmission.")
Note: The receive status bit is set to 1 at the time dummy data is set in the lower byte of the SIO
Transmit Buffer Register.
When the above conditions are met, the serial I/O starts receiving 8-bit serial data (LSB first)
synchronously with the receive shift clock.
12.4.3 Processing at End of CSIO Reception
When data reception is completed, the following operation is automatically performed in hardware.
(1) When reception is completed normally
The receive-finished (receive buffer full) bit is set to 1.
Note 1: If a receive-finished (receive buffer full) interrupt has been enabled, an interrupt
request is generated.
Note 2: A DMA transfer request is generated.
(2) When error occurs during reception
When an error (only overrun error in CSIO mode) occurs during reception, the overrun error bit
and receive sum bit are set to 1.
Note 1: If a receive-finished interrupt has been selected (by SIO Cause of Receive Interrupt
Select Register), neither a receive-finished interrupt request nor a DMA transfer
request is generated.
Note 2: If a receive error interrupt has been selected (by SIO Cause of Receive Interrupt Select
Register), a receive error interrupt request is generated when interrupt requests are
enabled. No DMA transfer requests are generated.
Содержание 32172
Страница 20: ... This is a blank page 16 ...
Страница 21: ...1 1 Overview 1 2 Block Diagram 1 3 Pin Functions 1 4 Pin Layout CHAPTER 1 CHAPTER 1 OVERVIEW ...
Страница 44: ...1 1 24 Rev 1 0 This is a blank page Overview 1 4 Pin Layout ...
Страница 58: ...2 2 14 Rev 1 0 This is a blank page CPU 2 6 Data Formats ...
Страница 122: ...4 4 26 Rev 1 0 This is a blank page EIT 4 13 Precautions on EIT ...
Страница 200: ...7 7 6 Rev 1 0 This is a blank page RESET 7 4 Precautions to Be Taken Immediately after Reset ...
Страница 240: ...8 8 40 Rev 1 0 This is a blank page INPUT OUTPUT PORTS AND PIN FUNCTIONS 8 5 Precautions on Input Output Ports ...
Страница 298: ...9 9 58 Rev 1 0 This is a blank page DMAC 9 4 Precautions on Using DMAC ...
Страница 416: ...10 10 118 Rev 1 0 This is a blank page INPUT OUTPUT TIMERS 10 6 TOM Output Related 16 bit Timers ...
Страница 658: ...14 14 16 Rev 1 0 REAL TIME DEBUGGER RTD 14 4 Typical Connection with the Host This is a blank page ...
Страница 718: ...16 16 16 Rev 1 0 This is a blank page D A CONVERTERS 16 3 Functional Description of the D A Converters ...
Страница 766: ...18 18 22 Rev 1 0 WAIT CONTROLLER 18 3 Typical Operation of the Wait Controller This is a blank page ...
Страница 776: ...19 19 10 Rev 1 0 RAM BACKUP MODE 19 4 Exiting RAM Backup Mode Wakeup This is a blank page ...
Страница 777: ...CHAPTER 20 CHAPTER 20 OSCILLATION CIRCUIT 20 1 Oscillator Circuit 20 2 Clock Generator Circuit ...
Страница 782: ...20 20 6 Rev 1 0 OSCILLATION CIRCUIT 20 2 Clock Generator Circuit This is a blank page ...
Страница 856: ...23 23 26 Rev 1 0 This is a blank page ELECTRICAL CHARACTERISTICS 23 6 AC Characteristics ...
Страница 857: ...24 1 A D Conversion Characteristics CHAPTER 24 CHAPTER 24 STANDARD CHARACTERISTICS ...
Страница 859: ...Appendix 1 1 Dimensional Outline Drawing APPENDIX 1 APPENDIX 1 MECHANICAL SPECIFICATIONS ...
Страница 861: ...Appendix 2 1 M32R E Instruction Processing Time APPENDIX 2 APPENDIX 2 INSTRUCTION PROCESSING TIME ...
Страница 865: ...Appendix 3 1 Precautions about Noise APPENDIX 3 APPENDIX 3 PRECAUTIONS ABOUT NOISE ...