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13
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13.2 Interrupt from Another CPU
13
COMMUNICATIONS BETWEEN CPU MODULES
(a) Setting data
* 1 Only when both of (D1) and (D2) are omitted, they can be actually omitted.
(b) Usable devices
The following devices are available for dedicated instructions.
* 1 Number of bit device digits can be specified for word data.
It can be specified with
.
For example, 16 points from M0 to M15 are specified with
.
(c) Control details
On the rise (OFF to ON) of the S(P).GINT or D(P).GINT execution command in
the sequence program, an interrupt is issued to the C Controller module.
Upon receipt of an interrupt from a programmable controller CPU, the C Controller
module performs the following processing.
• Executes a routine registered by the QBF_EntryCpuInt function as an
interrupt routine (interrupt program).
*1
• Resumes the user program that is waiting for an interrupt event by the
QBF_WaitEvent function.
* 1 The following C Controller modules cannot execute it as an interrupt routine (interrupt program).
1) When transmission of the instruction command to the C Controller module is
completed
The SM391 (S(P).GINT or D(P).GINT execution completed) flag of the
programmable controller CPU is set to ON.
2) When transmission of the instruction command to the C Controller module
failed
The SM391 (S(P).GINT or D(P).GINT execution completed) flag of the
programmable controller CPU is set to OFF.
Table 13.4 Setting data in S(P).GINT and D(P).GINT instructions
Setting data
Setting
Data type
(n1)
Start I/O No. of target CPU 16
Actually specified values are as follows:
CPU No.1: 3E0
H
, CPU No.2: 3E1
H
, CPU No.3: 3E2
H
, CPU No.4: 3E3
H
BIN 16 bits
(n2)
Interrupt pointer No.
(0 to 15)
BIN 16 bits
(D1)
*1
Completion device
(D1+0): Device that is turned ON for one scan upon completion of the instruction
processing
(D1+1): Device that is turned ON for one scan upon failure of the instruction
processing (When failed, D1+0 is also turned ON.)
Bit
(D2)
*1
Device where the completion status data is stored.
Word
Table 13.5 Usable devices
Internal device
File register
Constant
Bit
Word
*1
M, L, B
D, W, @
R, ZR
K, H
• Q12DCCPU-V with a serial number whose first five digits are "12041" or earlier
• Q06CCPU-V(-B)
Number of digits Head No. of bit device
K4M0
Содержание Q06CCPU-V
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