JVC TH-A9 Скачать руководство пользователя страница 40 | Manualshive

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TH-A9

1-40

ZIVA3-PEO (5/5)

186
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189

190
191

192

193
194
195
196

197
198
199
200
201
202
203
204
205

206

207

208

I

I/O

O

I

-

O

-

I

-

I

-

I
I

I

I

I

I

I

DVD-DATA7
/CDG-SCLK
DVD-DATA6
/CDG-SOS1
DVD-DATA5
/CDG-VFSY
DVD-DATA4
/CDG-SDATA
PIO10
VREQUEST

VSTROBE

VDD-3.3
NC
VSS
V-DACK

VDD-2.5
RESERVED
VSS
ERROR
HOST8SEL
HADDR0
HADDR1
HADDR2
DTACKSEL

CS

R/W

RD

DVD parallel compression data from the DVD DSP. When the DVD DSP transmits a 32-bit
word, it should first describe the WSB.
CDG-SDTA: CD+G (subcode) data, which indicates a serial subcode data input.
CDG-VSFY: CD+G (subcode) frame sync, which indicates the start of a frame or a

composite sync input.

CDG-SOS1: CD+G (subcode) block sync, which indicates a block start sync input.
CDG-SCLK: CD+G (subcode) clock, which indicates the input or output of the subcode

data clock.

Programmable I/O pin, which enters the input mode after resetting.
Video request. The decoder expresses VREQUEST to indicate that the video input buffer
has available space. The polarity is programmable.
Video strobe, which is a programmable, dual-mode pulse and either async or sync. In the
async mode, the external source sends VSTROBE to indicate that it is ready for data
transfer. In the sync mode, the signal becomes the VSTROBE clock data.
3.3 V supply voltage for I/O signals.
No connection.
Core logic and I/O signal grounding.
Video data acknowledgement in the case of the sync mode. Expressed when the DVD data
is valid. The polarity is programmable.
2.5 V supply voltage for the core logic.
Coupled with VSS or VDD-3.3.
Core logic and I/O signal grounding.
Input data error. If the ERROR signal from the DSP is unusable, grounding should be performed.
Permanently coupled with VDD-3.3.
Host address bus. This 3-bit address bus selects one of the six hosts interface registers.

Coupled with High to select the WAIT signal or with Low to select the DTACK signal.
(Motorola 68K mode)
Host chip selection. The host expresses CS to select the decoder for use in read/write.
The read or write operation starts at the negative-going edge of this signal.
Performs strobe read/write in the M mode and strobe write in the I mode. The host expresses
R/W LOW to select write or LOW to select read.
Performs strobe read in the I mode. Should be kept HIGH in the M mode.

Pin No.

Symbol

I/O

Function

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Содержание TH-A9

Страница 1: ...uffix J U S A C Canada Contents RM STHA9J DVD THEATER SYSTEM DVD MENU TUNING UP DOWN REC REW FF PAUSE STROBE MEMORY TV VIDEO MUTING F SEARCH B SEARCH PLAY CHANNEL TV VOL VOLUME STOP DVD AUDIO TV CATV DBS STANDBY ON VCR DECODE SUBTITLE TITLE AUDIO TIME DIGEST ZOOM VCR TV SLEEP SETTING TV RETURN FM MODE 100 AUDIO TV VCR CAT DBS CONTROL SUBWOOFER EFFECT CENTER TEST REAR R ENTER PLAY MODE THEATER POSI...

Страница 2: ...rrnet check Electrical shock hazard testing After re assembling the product always perform an isolation check on the exposed metal parts of the product antenna terminals knobs metal cabinet screw heads headphone jack control shafts etc to be sure the product is safe to operate without danger of electrical shock Do not use a line isolation transformer during this check Plug the AC line cord directl...

Страница 3: ...es invisible laserradiation and is equipped with safety switches whichprevent emission of radiation when the drawer is open and the safety interlocks have failed or are de feated It is dangerous to defeat the safety switches 5 CAUTION If safety switches malfunction the laser is able to function 6 CAUTION Use of controls adjustments or performance of procedures other than those specified herein may...

Страница 4: ...ng transport and before installation both sides of the laser diode on the replacement optical pickup are shorted After replacement return the shorted parts to their original condition Refer to the text 2 Do not use a tester to check the condition of the laser diode in the optical pickup The tester s internal power source can easily destroy the laser diode 1 2 Handling the traverse unit optical pic...

Страница 5: ...ti static measures 1 Do not touch the area around the laser diode and actuator 2 Do not check the laser diode using a tester as the diode may easily be destroyed 3 It is recommended that you use a grounded soldering iron when shorting or removing the laser diode Recommended soldering iron HAKKO ESD compatible product 4 Solder the land on the optical pickup s flexible cable Note Short the land afte...

Страница 6: ...A 125 V F901 1 6 A 125 V XV THA9 C J SEULEMENT Marquage Pour Le Remplacement Complet De Fusible PRECAUTIONS SUR LES FUSIBLES POUR UNE PROTECTION CONTINUE CONTRE DES RISQUES D INCENDIE REMPLACER SEULEMENT PAR UN FUSIBLE DU MEME TYPE Le symbole graphique Ce symbole signifie fusible de type a fusion rapide doit etre interprete comme suit Note It s means J for U S A market model and C for canada marke...

Страница 7: ...A 125 V SP PWA9 C J SEULEMENT Marquage Pour Le Remplacement Complet De Fusible PRECAUTIONS SUR LES FUSIBLES POUR UNE PROTECTION CONTINUE CONTRE DES RISQUES D INCENDIE REMPLACER SEULEMENT PAR UN FUSIBLE DU MEME TYPE Le symbole graphique Ce symbole signifie fusible de type a fusion rapide doit etre interprete comme suit Note It s means J for U S A market model and C for canada market model Importanc...

Страница 8: ...remove the DVD door Remove the four screws B that attach the left and right side covers of the unit from the bottom panel Remove the left and right side covers by moving each of them in the direction of the corresponding arrow 1 2 Removing the right and left side covers See Fig 2 Disassembly method Fig 1 Fig 2 DVD door A A B B Right side cover Left side cover Bottom panel ...

Страница 9: ...em upward from the main unit and moving them toward the front Disconnect the card wire of the DVD mechanism from the connector CN101 on the DVD servo board Disconnect the wire of the LED board from the connector CN812 on the analog input output board Removing the front panel assembly and the DVD mechanism base See Figs 3 to 7 1 2 3 4 5 Remove the front panel assembly and the DVD mechanism together...

Страница 10: ...rd Removing the display board See Fig 9 1 Prior to performing the following procedure remove the left and right side covers Also remove the DVD door Remove the four screws G from the back of the DVD mechanism base that retain the DVD mechanism cover Remove the DVD mechanism assembly from the DVD mechanism base Removing the DVD mechanism assembly See Figs 10 and 11 1 2 This work is possible even wh...

Страница 11: ... as if pulling it out of the rear panel Remove two screws L that attach the analog board to the analog board bracket Removing the analog board See Figs 12 to 14 1 2 3 4 5 Prior to performing the following procedure remove the left and right side covers Also remove the DVD door Also remove the front panel assembly and the DVD mechanism base Remove the three screws M that retain the tuner assembly f...

Страница 12: ...or Also remove the front panel assembly and the DVD mechanism base Disconnect the wire from the connector CN972 on the power supply board Remove the two screws N that retain the fan motor assembly from the right side of the unit Remove the two screws O that attach the fan motor assembly to the fan bracket Removing the fan motor assembly See Figs 15 and 16 1 2 3 When reassembling check that the gea...

Страница 13: ... CN810 and CN811 on the analog input output board Remove the four screws R that retain the door arm assembly from the top of the unit Remove the two screws S that retain the door arm assembly from the left and right sides of the unit Removing the door arm assembly See Figs 20 to 23 1 2 3 R Analog I O board CN811 Door arm assembly Analog I O board CN810 Power supply board Door arm assembly R R S Do...

Страница 14: ...anism base Also remove the analog board Also remove the gear motor assembly Also remove the door arm assembly Remove the screw V that retains the power supply board from the top of the unit Remove three screws W that retain the power supply board from the rear panel of the unit Pull out the power supply board from clamp a Disconnect the wire from the connector CN972 on the power supply board and t...

Страница 15: ... the AV decoder board from the analog input output board unplug the connectors CN501 CN502 and CN503 on the AV decoder board from the analog input output board Remove the four screws Y that retain the analog input output board from the rear panel of the unit This procedure also detaches the rear panel Note The analog input output board can be removed even when it is engaged with the AV decoder boa...

Страница 16: ...rness from connector CN109 in the lower part of the amplifier assembly Pull out the volume knob Remove the ten screws C attaching the heat sink cover Remove the ten screws D and the one screw E at taching the amplifier cover 1 2 3 4 5 Removing the amplifier assembly and the amplifier cover See Figs 2 and 3 Disassembly method Fig 2 Fig 3 Amplifier assembly Amplifier cover Amplifier assembly Volume ...

Страница 17: ...performing the following procedure remove the heat sink cover amplifier assembly and the amplifier cover Disconnect the wire from the connectors CN107 and CN108 on the power supply SP terminal board Unplug the connectors CN110 and CN111 on the power supply SP terminal board from the main amplifier board 1 2 Removing the power supply SP terminal board See Figs 4 and 5 Fig 4 Main amplifier board Pow...

Страница 18: ...r supply SP terminal board Disconnect the harness from connector CN104 on the main amplifier board Remove the seven screws H and the main amplifier board with the heat sink Remove the two screws I attaching the power amplifier board A and the two screws J attaching the power amplifier board B on the underside of the main amplifier board Disconnect connector CN102 and CN103 on the power amplifier b...

Страница 19: ...plifier board B Disconnect the harness from connector CN104 on the main amplifier board Disconnect the wire from connector CN107 on the power supply SP terminal board Remove the four screws M attaching the power transformer Removing the power transformer See Figs 12 and 13 1 2 3 Prior to performing the following procedure remove the heat sink cover the amplifier assembly the amplifier cover the pr...

Страница 20: ...rst push the power switch to be on Then the door slides to the position to be able to push the stop button After that pull AC plug out While holding the STOP and OPEN CLOSE keys on the main unit depressed turn on the primary power supply The FL display should show TEST JC 1 Press the ENTER key on the remote controller Initialization of the EEPROM starts and lasts for about 3 seconds The initializa...

Страница 21: ...03b5 03b4 03b3 03b2 03b1 03AF 03AE 03b0 03Ad 03Ac 03Ab 03AA 03A9 03A8 03A7 03A6 03A4 03A3 03A5 03A2 03A1 03A0 039F 039E 039d 039c 039A 0399 039b 0398 0397 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 OK OK OK OK OK OK OK 32 OK 000f 000e 000d 000c 000b 000A 0009 0008 0007 0006 0005 33 34 35 36 37 38 39 OK OK OK OK OK OK OK 0004 0003 40 ...

Страница 22: ...CC CS SK NC GND DO DI 8 7 6 5 8 pin SOP Pin No Program enable With built in pull up resistor Power supply Chip selection Serial clock input Serial data input Serial data output Ground No connection Note The pull up resistor of the PE pin is about 2 5 M Ω VCC 5V AK93C65AF X IC403 EEPROM 1 Terminal layout 2 Block diagram 3 Pin function 1 2 3 4 5 6 7 8 PE VCC CS SK DI DO GND NC Symbol Function Discri...

Страница 23: ... RFINP TESTSG AGCO AGCG PEAK BOTTOM RFENV BDO OFTR DCRF RFC VCC3 RFOUT RFDIFO GND3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 HDTYPE VIN12 VIN11 GND1 VIN4 VIN3 VIN2 VIN1 VREF1 VCC1 VIN10 VIN9 VIN8 VIN7 VIN6 VIN5 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 TEN TEOUT ASN ASOUT FEN FEOUT VSS TG VDD GND2 VREF2 VCC2 VHALF DFLTON DFLTOP DSFLT 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 3...

Страница 24: ... UDQM NC VCC DQ8 9 VSS DQ10 11 VDD DQ12 13 VSS DQ14 15 VSS Power supply Data input output Connect to GND Data input output Power supply Data input output Connect to GND Data input output Power supply Lower DQ mask enable Write enable Column address strobe Row address strobe Chip enable Address inputs Address inputs Power supply Connect to GND Address inputs Non connect Clock enable System clock in...

Страница 25: ... VM1 VM1 GND VM2 VM2 OUT2 GND IN2 IN2 MUTE1 MUTE2 SS GND VREF VERFO Vm2 IN3 IN3 OUT3 CH3IN IN1 IN1 OUT1 VM1 VM1 VM2 VM2 OUT2 VREF0 VREF REGB REG IN2 IN2 VM3 VM3 VM4 VM4 IN4 IN4 OUT4 VM5 VM5 IN5 IN5 OUT5 E5 E4 E3 VBS2 VBS2 VBS2 VBS2 VBS2 VBS2 CH5 X8 CH4 X8 CH3 X8 VBS1 VBS2 R R R R Vrefm1 Vrefm2 Vm1 Vm2 VREF0 Hi Sleep SLEEP BIAS VBS1 Low Open MUTE ON 1 4 CH 5CH TSD GND 4PIN MUTE1 MUTE2 SS GND 1 25V ...

Страница 26: ...Analog brightness signal G drive signal Analog brightness signal G drive signal Power supply for Y G DAC Analog chroma signal Analog chroma signal Power supply for C Cr RDAC Connect to ground for DAC Standard BIAS for DAC1 Standard voltage for DAC1 Power supply for DAC Standard voltage for DAC2 Standard BIAS for DAC2 Non connect Analog composite drive signal Analog composite drive signal Power sup...

Страница 27: ...I I I I I I I I I I O I O I O I O I O I O I O I O Pin No Pin No Symbol Symbol I O I O Function Function Micon wait signal input Read enable Write enable Non connect Chip select for ODC Chip select for ZIVA Chip select for outer ROM Driver mute Non connect Spin kick output LSI reset Bus selection input Address bus 0 for CPU Address bus 1 for CPU Address bus 2 for CPU Address bus 3 for CPU Power sup...

Страница 28: ...VSS CPUADR15 CPUADR14 CPUADR13 CPUADR12 VDD CPUADR11 CPUADR10 CPUADR9 CPUADR8 CPUADR7 CPUADR6 CPUADR5 CPUADR4 CPUADR3 CPUADR2 CPUADR1 VSS CPUADR0 NCS NWR NRD VDD CPUDT7 CPUDT6 PVPPDRAM PTESTDRAM PVDDDRAM PVSSDRAM CPUDT5 CPUDT4 CPUDT3 VSS CPUDT2 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 DMARQ NIOWR...

Страница 29: ...ontrol address System control address System control address Power supply 2 7V System control address System control address System control address System control address System control address System control address System control address System control address System control address System control address System control address GND System control address System control chip selection System cont...

Страница 30: ...l core 2 5V Tangential Phase difference FEP RFENV FEP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Pin No Pin No Symbol Symbol I O I O Function Function 2 Pin function 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 9...

Страница 31: ... 9 35 34 33 32 10 11 12 13 31 30 29 28 14 15 16 17 27 26 25 24 18 19 20 21 23 22 A19 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 44 NC 1 NC 1 Pin layout MSM531622F91G X IC402 1M x 16Bit 2M x 8Bit change enable ROM 2 Block diagram 3 Pin function A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 CE OE CE Control OE Address Buffer Memory Cell Matrix 1 048 57...

Страница 32: ...in No Pin name Function 1 2 3 4 5 Ground terminal Input terminal Output terminal No connection Chip enable terminal GND VDD VOUT NC CE 3 Pin function 2 Block diagram 1 Terminal layout RN5RZ33BA X IC1 IC102 High cycle module 1 2 3 5 4 VDD VOUT NC CE GND ...

Страница 33: ...3 GND IN1 NF GND BIAS 12V PRE Vcc NC Vcc Vcc OUT OUT SUB R2 TR3 TR1 R1 TR4 C1 R3 TR2 R4 D1 R5 TR5 TR6 R7 TR8 TR7 R6 TR9 TR10 R8 TR11 TR13 R12 TR12 R11 C2 TR14 R13 R20 TR15 TR16 R14 TR23 TR21 C3 R15 TR17 TR18 TR19 R17 TR20 R16 R21 TR24 TR22 R18 R19 R9 R10 4 1 2 8 Vcc 12 5 9 7 6 10 14 15 16 17 19 18 11 CH1 VE CH1 VE CH2 VE CH2NF CH2IN CH3IN CH3NF CH3 VE CH3 VE CH2 VE 13 PRE Vcc CH1IN CH1NF PRE Vcc B...

Страница 34: ...C503 Write timing control 1 Pin layout Block diagram 1 Terminal layout 1 2 3 4 8 7 6 5 VCC PR CLR Q CK D Q GND 1 2 3 IN B IN A GND VCC OUT Y 5 4 TC7SH32FU X IC312 Timing control 1 Terminal layout 1 5 4 2 3 VCC OUT Y IN B IN A GND 1 Terminal layout TC7WH74FU X IC321 Clock buffer TC7SH08FU X IC311 Timing control ...

Страница 35: ... 7 6 5 Vcc C2 Y1 A2 G1 A1 Y2 GND 1 Terminal layout 2 Block diagram TC7W125FU X IC202 Buffer 1 2 1 2 3 4 5 6 7 8 OUT1 IN1 IN1 VEE IN2 IN2 OUT2 Vcc BA15218N BA15218N IC104 IC108 IC109 IC110 OP AMP 1 Pin layout Block diagram ...

Страница 36: ...xpresses RESET Active Low to execute hardware resetting of the decoder RESET is expressed for at least 20 ms to guarantee optimum initialization to occur after power has stabilized Core logic and I O signal grounding Transfer incomplete data acknowledgement which is an Active Low signal indicating that transfer started by the host is not completed WAIT is expressed after negative going edge of CS ...

Страница 37: ...ignal grounding Memory data 3 3 V supply voltage for I O signals Memory data Core logic and I O signal grounding Memory data SDRAM LDQM SDRAM UDQM 3 3 V supply voltage for I O signals SDRAM write enable The decoder expresses Active Low to request write operation of the SDRAM array Core logic and I O signal grounding SDRAM system clock Active Low SDRAM column address Active Low SDRAM row address 3 ...

Страница 38: ...signal grounding Coupled with VSS or VDD 3 3 Programmable I O pin which enters input mode after resetting Coupled with VSS or VDD 3 3 Programmable I O pin which enters input mode after resetting Video data bus for byte serial CbYCrY data in sync with VCLK In power up the decoder does not drive VDATA In boot up the decoder uses the configuration parameters for drive or tri state VDATA 2 5 V supply ...

Страница 39: ...nel for each audio sample The polarity is programmable PCM bit clock Obtained by dividing DA XCK by 8 DA BCK takes a value of 48 or 32 times the sampling clock 2 5 V supply voltage for the core logic Audio master frequency clock which is used to generate DA BCK and DALRCK DA XCK takes a value of 384 or 256 times the sampling frequency Core logic and I O signal grounding PCM input data with 2 chann...

Страница 40: ...mable dual mode pulse and either async or sync In the async mode the external source sends VSTROBE to indicate that it is ready for data transfer In the sync mode the signal becomes the VSTROBE clock data 3 3 V supply voltage for I O signals No connection Core logic and I O signal grounding Video data acknowledgement in the case of the sync mode Expressed when the DVD data is valid The polarity is...

Страница 41: ...Printed in Japan 200103 S No 20926 VICTOR COMPANY OF JAPAN LIMITED AUDIO COMMUNICATION BUSINESS DIVISION PERSONAL MOBILE NETWORK B U 10 1 1Chome Ohwatari machi maebashi city 371 8543 Japan TH A9 ...

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