Jennic JN5142, Техническое описание

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© NXP Laboratories UK 2012 JN-DS-JN5142 1v0 3
8 Wireless Transceiver 27
8.1 Radio 27
8.1.1 Radio External Components 28
8.1.2 Antenna Diversity 28
8.2 Modem 30
8.3 Baseband Processor 31
8.3.1 Transmit 31
8.3.2 Reception 31
8.3.3 Auto Acknowledge 32
8.3.4 Beacon Generation 32
8.3.5 Security 32
8.4 Security Coprocessor 32
9 Digital Input/Output 33
10 Serial Peripheral Interface 35
11 Timers 38
11.1 Peripheral Timer/Counters 38
11.1.1 Pulse Width Modulation Mode 39
11.1.2 Capture Mode 39
11.1.3 Counter/Timer Mode 40
11.1.4 Delta-Sigma Mode 40
11.1.5 Example Timer/Counter Application 41
11.2 Tick Timer 41
11.3 Wakeup Timers 42
11.3.1 RC Oscillator Calibration 43
12 Pulse Counters 44
13 Serial Communications 45
13.1 Interrupts 46
13.2 UART Application 46
14 JTAG Debug Interface 48
15 Two-Wire Serial Interface (I
2
C) 49
15.1 Connecting Devices 49
15.2 Clock Stretching 50
15.3 Master Two-wire Serial Interface 50
15.4 Slave Two-wire Serial Interface 52
16 Random Number Generator 53
17 Analogue Peripherals 54
17.1 Analogue to Digital Converter 54
17.1.1 Operation 55
17.1.2 Supply Monitor 56
17.1.3 Temperature Sensor 56
17.2 Comparator 56
18 Power Management and Sleep Modes 57
18.1 Operating Modes 57
18.1.1 Power Domains 57