Hardware
Copyright IXXAT Automation GmbH
168
IEM Manual, 1.5
7.2.1 Parallel interface access
Processor
IEM
DB[15..0]
ADDR[13..1]
DB[15..0]
ADDR[13..1]
Reset#
CS#
RD#
WR#
BE0#
BE1#
GND
ADDR[13..1]
DB[15..0]
VCC
CS#
RD#
WR#
ADDR0
BHE#
GPIO2HOST2
GPIO2HOST1
GPIO2NIOS1
GPIOx
GPIOy
INTERRUPTx
INTERRUPTy
VCC
GND
GPIO2NIOS2 (future use)
GPIOz
Figure 7-12: Parallel interface access
7.2.2 SPI interface access
Processor
IEM
Reset#
SPI_CS#
SPI_CLK
SPI_MOSI
SPI_MISO
GND
VCC
SPI_CS#
SPI_CLK
SPI_MOSI
SPI_MISO
GPIO2NIOS1
GPIOx
GPIOy
VCC
GND
GPIO2NIOS2 (future use)
GPIOz
GPIO2HOST2
INTERRUPTy
Figure 7-13: SPI interface access