IXXAT IEM-200 EtherCAT, Руководство пользователя

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Hardware
Copyright IXXAT Automation GmbH
161
IEM Manual, 1.5
7 Hardware
7.1 Connectors and LEDs
7.1.1 Board-to-Board Connector
The board-to-board connector implemented on the IEM carries a parallel
(memory mapped) interface as well as a serial (SPI) interface.
When using the parallel interface, the DPRAM can be accessed directly as a
regular 16 bit wide DPRAM. When using the serial interface, the application
processor must provide enough local RAM to mirror the process data image
typically 1.5 Kbytes per direction).
7.1.1.1 Connector pin out
The Layout of the board-to-board connector is described in Figure 7-1.
Pin Name Direction Description Level
b25 GPIO2NIOS1 input GPIO from application processor to IEM I/O
a25 RESET# input reset, active low I/O
b24 GPIO2NIOS2 input GPIO from application processor to IEM I/O
a24 GND - ground -
b23 BE0# input byte enable 0, active low I/O
a23 RD# input read, active low, parallel interface I/O
SPI_CLK SPI clock, serial interface
b22 GND - ground -
a22 BE1# input byte enable 1, active low I/O
b21 CS# input chip select, active low, parallel interface I/O
SPI_CS# input SPI chip select, active low, serial interface I/O
a21 WR# input write, active low, parallel interface I/O
SPI_MOSI input data input, serial interface I/O
b20 D0 bidirectional Data bus, bit 0 I/O
a20 GND - ground -
b19 D2 bidirectional data bus, bit 2 I/O
a19 D1 bidirectional data bus, bit 1 I/O
b18 GND - ground -
a18 D3 bidirectional data bus, bit 3 I/O
b17 D4 bidirectional data bus, bit 4 I/O
a17 D5 bidirectional data bus, bit 5 I/O
b16 D6 bidirectional data bus, bit 6 I/O
a16 D7 bidirectional data bus, bit 7 I/O
b15 D8 bidirectional data bus, bit 8 I/O
a15 D9 bidirectional data bus, bit 9 I/O
b14 D10 bidirectional data bus, bit 10 I/O
a14 D11 bidirectional data bus, bit 11 I/O