IXXAT IEM-200 EtherCAT, Руководство пользователя

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Hardware
Copyright IXXAT Automation GmbH
162
IEM Manual, 1.5
b13 D12 bidirectional data bus, bit 12 I/O
a13 GND - ground -
b12 D14 bidirectional data bus, bit 14 I/O
a12 D13 bidirectional data bus, bit 13 I/O
b11 ADDR13 input address line 13 I/O
a11 D15 bidirectional data bus, bit 15 I/O
b10 ADDR11 input address line 11 I/O
a10 ADDR12 input address line 12 I/O
b9 ADDR9 input address line 9 I/O
a9 ADDR10 input address line 10 I/O
b8 GND - ground -
a8 ADDR8 input address line 8 I/O
b7 ADDR7 input address line 7 I/O
a7 ADDR6 input address line 6 I/O
b6 ADDR5 input address line 5 I/O
a6 ADDR4 input address line 4 I/O
b5 ADDR3 input address line 3 I/O
a5 GND - ground -
b4 ADDR1 input address line 1 I/O
a4 ADDR2 input address line 2 I/O
b3 GPIO2HOST1 output GPIO from IEM to application processor on
parallel interface I/O
SPI_MISO Data output on serial interface I/O
a3 GPIO2HOST2 output GPIO from IEM to application processor I/O
b2 3V3 input Vcc Power supply
a2 GND - ground -
b1 3V3 input Vcc Power supply
a1 GND - ground -
Figure 7-1: Board-to-Board connector pin description
7.1.1.2 Signal description
Attention:
When connecting to a microcontroller please make sure that all sig-
nals to the IEM are compliant with the Cyclone III specification from
Altera (Application Note 447 [HW1]). Especially apply series termi-
nation resistors to minimize overshoot effects.
7.1.1.2.1 Address inputs (ADDR1
– ADDR13)
These are the address input pins, which address the DPRAM. ADDR1 con-
tains the least significant bit of the 16 bit access address (typically to connect
to A
1
of application processor), ADDR13 contains the most significant bit.