LV Intel
®
Pentium
®
III Processor 512K Dual Processor Platform
Design Guide
15
Table 7 contains the length specifications for the segments of the T-topology. Note that lengths L0
and L1 must be length matched to within 0.25 inches (per net, not between nets). Table 8 contains
the component values for the T-topology.
3.3
Wired-OR Signal Considerations
The Wired-OR signals of the processor’s host bus require additional consideration. The Wired-OR
signals in a LV Intel Pentium
III
processor 512K processor system are HIT#, HITM#, BNR#,
AERR#, BERR#, and BINIT#. The Wired-OR signals may be driven by multiple bus agents at the
same time, such as both processors asserting the HIT# signal to signify a cache hit on a line they
both contain. With multiple driving agents, these signals are susceptible to being overdriven, which
results in excessive overshoot and ringback on these signals.
Terminating the Wired-OR signals at the chipset branch of the T topology reduces the effect of
multiple driving agents on these signals. Intel recommends that system designers carefully examine
the signal integrity of these signals and optionally implement the circuit shown in Figure 5. This
recommendation will work correctly for systems designed with the standard T topology.
Please note that the incorporation of Wired-OR termination is optional. Intel has not seen any
system failures on systems which do not implement the Wired-OR termination recommendations.
Therefore, systems which are already in the latter phases of design may wish to forgo
implementing these recommendations until an opportunity presents itself to incorporate them.
However, it is the responsibility of the system designer to ensure that the signal quality of these
signals meets the component specifications.
Table 7. Trace Lengths for “T” Topology (ServerWorks Chipset)
Segment
Min Length (inches)
Max Length (inches)
L0
2.8
3.4
L1
2.8
3.4
L2
1.7
2.3
Table 8. Component Values for T Topology
Reference
Value
Tolerance
R1 (on chip)
R3
N/A
R2 (on chip)
R4
N/A
R3
68
Ω
+/- 10%
R4
68
Ω
+/- 10%
