IDT 89HPES12N3, Руководство пользователя

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IDT Transparent Mode Operation Downstream Port B Configuration Space Registers
PES12N3 User Manual 9 - 11 June 7, 2006
Notes
Downstream Port B Configuration Space Registers
All configuration space locations not listed in Table 9.7 return a value of zero when read. Writes to these
locations are ignored and have no side-effects. Port B configuration space registers may be read and
written via the slave SMBus interface and initialized from the serial EEPROM using the CSR system
address formed by adding the base address 0x1000 to the PCI configuration space offset address.
24 SLOT RWL 0x0 Slot Implemented. This bit is set when the PCI Express
link associated with this Port is connected to a slot. Does
not apply to the upstream port and should be set to zero.
29:25 IMN — — PCIECAP - PCI Express Capability (0x040) on page 9-26
31:30 Reserved RO 0x0 Reserved field.
Cfg.
Offset
Size
Register
Mnemonic
Register Definition
0x000 Word PB_VID VID - Vendor Identification (0x000) on page 9-17
0x002 Word PB_DID DID - Device Identification (0x002) on page 9-17
0x004 Word PB_PCICMD PCICMD - PCI Command (0x004) on page 9-17
0x006 Word PB_PCISTS PCISTS - PCI Status (0x006) on page 9-18
0x008 Byte PB_RID RID - Revision Identification (0x008) on page 9-19
0x009 3 Bytes PB_CCODE CCODE - Class Code (0x009) on page 9-19
0x00C Byte PB_CLS CLS - Cache Line Size (0x00C) on page 9-20
0x00D Byte PB_PLTIMER PLTIMER - Primary Latency Timer (0x00D) on page 9-20
0x00E Byte PB_HDR HDR - Header Type Register (0x00E) on page 9-20
0x00F Byte PB_BIST BIST - Built-in Self Test (0x00F) on page 9-20
0x010 DWord PB_BAR0 BAR0 - Base Address Register 0 (0x010) on page 9-20
0x014 DWord PB_BAR1 BAR1 - Base Address Register 1 (0x014) on page 9-20
0x018 Byte PB_PBUSN PBUSN - Primary Bus Number (0x018) on page 9-21
0x019 Byte PB_SBUSN SBUSN - Secondary Bus Number (0x019) on page 9-21
0x01A Byte PB_SUBUSN SUBUSN - Subordinate Bus Number (0x01A) on page 9-21
0x01B Byte PB_SLTIMER SLTIMER - Secondary Latency Timer (0x01B) on page 9-21
0x01C Byte PB_IOBASE IOBASE - I/O Base (0x01C) on page 9-21
0x01D Byte PB_IOLIMIT IOLIMIT - I/O Limit (0x01D) on page 9-22
0x01E Word PB_SECSTS SECSTS - Secondary Status (0x01E) on page 9-22
0x020 Word PB_MBASE MBASE - Memory Base (0x020) on page 9-23
0x022 Word PB_MLIMIT MLIMIT - Memory Limit (0x022) on page 9-23
0x024 Word PB_PMBASE PMBASE - Prefetchable Memory Base (0x024) on page 9-23
0x026 Word PB_PMLIMIT PMLIMIT - Prefetchable Memory Limit (0x026) on page 9-24
Table 9.7 Downstream Port B Configuration Space Registers (Part 1 of 3)
Bit
Field
Field
Name
Type
Default
Value
Description