IDEC FS1A-C11S, Руководство пользователя

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LOGIC
5-327
C
h
a
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r 5
LOGIC FUNCTION
AND
As shown in Fig. 5-18 and 5-19, this function reflects the results of a logic (AND) function
processing for multiple inputs (I
n
) in the function output (O
n
).
Fig. 5-18 AND function circuit
I
1
I
2
I
n
O
n
on
off
on
off
on
off
on
off
Fig. 5-19 Operation timing of the AND function
OR
As shown in Fig. 5-20 and 5-21, this function reflects the results of a logic (OR) function processing
for multiple inputs (I
n
) in the function output (O
n
).
Fig. 5-20 OR function circuit
I
1
I
2
I
n
O
n
on
off
on
off
on
off
on
off
Fig. 5-21 Operation timing of the OR function
I
1
I
2
I
n
O
ｎ
I
1
I
2
I
n
O
ｎ
...
...
...
...
&
>=1