Freescale Semiconductor PXR4030, Справочное руководство

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External Bus Interface (EBI)
30-46 Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
access), the EBI errors the access on the internal bus and does not start the access (nor assert D_TEA)
externally.
Table 30-21 shows which external transfers are generated by the EBI for the misaligned access cases in
Table 30-20 , for each port size.
The number of external transfers for each internal AHB master request is determined by the HSIZE value
for that request relative to the port size. For example, a half-word write to @011 (misaligned case #2) with
16-bit port size results in 4 external 16-bit transfers because the HSIZE is 64-bits. For cases where two or
more external transfers are required for one internal transfer request, these external accesses are considered
part of a “small access” set, as described in
Section 30.4.2.6, Small Accesses (Small Port Size and Short
Burst Length) .
Table 30-20. Misalignment Cases Supported by a 64 bit AMBA EBI (internal bus)
No.
1
1
Misaligned case number. Only transfers where HUNALIGN=1 are numbered as misaligned cases.
Program Size and
byte offset
Address
[29:31]
2
2
Address on internal master AHB bus, not necessarily address on external D_ADD pins.
Data Bus Byte Strobes
3
3
Internal byte strobe signals on AHB bus. Shown with Big-Endian byte ordering in this table, even though
internal master AHB bus uses Little-Endian byte-ordering (EBI flips order internally).
HSIZE
4
4
Internal signal on AHB bus; 00=8-bits, 01=16 bits, 10=32 bits, 11=64-bits. HSIZE is driven according to the
smallest aligned container that contains all the requested bytes. This results in extra EBI external transfers in
some cases.
HUNALIGN
5
5
Internal signal on AHB bus that indicates that this transfer is misaligned (when 1).
1 Half @0x1,0x9 001 0110_0000 10 1
2 Half @0x3,0xB 011 0001_1000 11 1
3 Half @0x5,0xD 101 0000_0110 10 1
4
-
Half @0x7, 0xF
(2 AHB transfers)
111
000 0000_0001
1000_0000 01
6
00
6
For this case, the EBI internally treats HSIZE as 00 (1-byte access).
1
0
5 Word @0x1,0x9 001 0111_1000 11 1
6 Word @0x2,0xA 010 0011_1100 11 1
7 Word @0x3,0xB 011 0001_1110 11 1
8
-
Word @0x5,0xD
(2 AHB transfers)
101
000 0000_0111
1000_0000 10
00 1
0
9
-
Word @0x6, 0xE
(2 AHB transfers)
110
000 0000_0011
1100_0000 10
7
01
7
For this case, the EBI internally treats HSIZE as 01 (2-byte access).
1
0
10
11 Word @0x7,0xF
(2 AHB transfers)
111
000 0000_0001
1110_0000 10
6
10
1
1
12
-
Doubleword @0x4,0x8
(2 AHB transfers)
100
000 0000_1111
1111_0000 11
8
10
8
For this case, the EBI internally treats HSIZE as 10 (4-byte access).
1
0
13
-
Doubleword @0x2,0xA
(2 AHB transfers)
010
000 0011_1111
1100_0000 11
01 1
0
14
15 Doubleword 0x6,0xE
(2 AHB transfers)
110
000 0000_0011
1111_1100 11
7
11
1
1