Memory offset and full register reset value
See
4.5.1 Serial Configuration Control registers summary
The following table shows the MCP_WDOGCTI_CTRL Register bit assignments.
Table 4-98 MCP_WDOGCTI_CTRL Register bit assignments
Bits
Name
Type
Function
[31:16] -
-
Reserved.
[15:8]
TODBGENSEL
RW
CTI TODBGENSEL input.
Reset value
0x00
.
[7:0]
-
-
Reserved.
4.5.68
SCP_WDOGCTI_CTRL Register
The SCP_WDOGCTI_CTRL Register characteristics are:
Purpose
CTI trigger mask register.
Usage constraints
There are no usage constraints.
Configurations
Available in all N1 board configurations.
Memory offset and full register reset value
See
4.5.1 Serial Configuration Control registers summary
The following table shows the SCP_WDOGCTI_CTRL Register bit assignments.
Table 4-99 SCP_WDOGCTI_CTRL Register bit assignments
Bits
Name
Type
Function
[31:16] -
-
Reserved.
[15:8]
TODBGENSEL
RW
CTI TODBGENSEL input.
Reset value
0x00
.
[7:0]
-
-
Reserved.
4.5.69
DBGEXPCTI_CTRL Register
The DBGEXPCTI_CTRL Register characteristics are:
Purpose
CTI trigger mask register.
Usage constraints
There are no usage constraints.
Configurations
Available in all N1 board configurations.
Memory offset and full register reset value
See
4.5.1 Serial Configuration Control registers summary
The following table shows the DBGEXPCTI_CTRL Register bit assignments.
4 Programmers model
4.5 Serial Configuration Control registers
101489_0000_02_en
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