Epson S5U1C17001C, Руководство пользователя

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S5U1C17001C ManUal
EPSOn
5-161
(C COMPilEr PaCkagE fOr S1C17 faMily) (Ver. 1.5.0)
5 gnU17 iDE
5
IDE
[Comment:]
You can enter any comments here. Up to 255 characters can be entered. The comments entered here are
written in the parameter file.
Area list
Shows one area information in each line. Information is listed in alphabetical order, except that stack area
information is displayed collectively at the bottom of the list.
[Type]
Shows the type of area (ROM, RAM, IO, or STACK).
[Start-End Address]
Shows the start and end addresses of the area in hexadecimal notation.
[Wait R/W]
The first two single-digit values indicates the number of wait states during a read cycle (first digit) and
the number of wait states during a write cycle (second digit), respectively. The words "byte" (8 bits),
"halfword" (16 bits), and "word" (32 bits) indicate the access size in which the area is accessed. If the
rest is blank, the area is accessed in little endian mode. The areas set for big endian are marked by
"Big".
[Comments]
Shows the comment entered in each area information. You do not need to enter the symbol "#" to set off
comments.
Shown below are the contents initially set when you create a project.
When S1C17 is selected for the target CPU device
area Start-end address Wait states (r/W) access size area comment
RAM
0x000000–0xFFFFFF
0/0 word All Area
STACK
0x000000-0x000FBF
– – Stack area
When S1C17701 is selected for the target CPU device
area Start-end address Wait states (r/W) access size area comment
RAM 0x000000–0x000FBF 0/0 word Internal RAM
IO
0x004000–0x0043FF
0/0 byte Peripheral Area1
IO
0x005000–0x005FFF
2/2 byte Peripheral Area2
ROM 0x008000–0x017FFF 0/0 halfword ROM (Flash)
RAM 0x080000–0x08055F 1/1 byte SRAM (LCD Display)
IO
0xFFFC00–0xFFFFFF
0/0 byte Reserved for Core I/O
STACK
0x000000-0x000FBF
– – Stack area
When S1C17702 is selected for the target CPU device
area Start-end address Wait states (r/W) access size area comment
RAM 0x000000-0x002FBF 0/0 Word Internal RAM
IO 0x004000-0x0043FF 0/0 Byte Peripheral Area1
IO
0x005000-0x005FFF
0/0 Byte Peripheral Area2
ROM 0x008000-0x027FFF 1/0 Halfword ROM(Flash)
RAM 0x080000-0x08055F 1/1 Byte SRAM(LCD Display)
IO 0xFFFC00-0xFFFFFF 0/0 Byte Reserved for Core I/O
STACK
0x000000-0x002FBF
– – Stack area
When S1C17704 is selected for the target CPU device
area Start-end address Wait states (r/W) access size area comment
RAM 0x000000-0x000FBF 0/0 Word Internal RAM
IO 0x004000-0x0043FF 0/0 Byte Peripheral Area1
IO
0x005000-0x005FFF
2/2 Byte Peripheral Area2
ROM
0x008000-0x017FFF
1/0 Halfword ROM(Flash)
RAM 0x080000-0x08055F 1/1 Byte SRAM(LCD Display)
IO 0xFFFC00-0xFFFFFF 0/0 Byte Reserved for Core I/O
STACK
0x000000-0x000FBF
– – Stack area