Document Number: 002-10635 Rev. *I
Page
259 of 325
S6J3310/20/30/40 Series
*7 Use examples
Figure 9-3: Coupling Capacitance (Example)
Notes:
−
C1: more than 10 μF low ESR capacitors
−
C2: 0.1 μF ceramic capacitors
−
C3,C4: 2.2 μF low ESR capacitors
−
Impedance of each power line must be as low as possible.
Notes:
−
When DAC is not used in your system, the related pins should be
−
AVCC3_DAC = GND and AVSS = GND
−
C_L = OPEN and C_R = OPEN
−
DAC_L = OPEN and DAC_R = OPEN
Low Noise Regulator
Post LPF / Buffer
Post LPF / Buffer
C1
C2
C3
C4
AVCC3
_
DAC
AVSS
AVSS
AVSS
DAC_R
DAC_L
C_R
C_L