Chapter 6: Instructions
135
Transfer Instruction Details
Instruction
Mnemonic
Load Absolute Address
Range
Bit
■
Word
LDR
DLDR
Store value at absolute address
Sr in D, D
←
(Sr)
■
Double words
Ladder
Store the value located at the absolute address pointed to by Sr into
register D.
R0 word absolute address: 0
M0 word absolute address: 192
W0 word absolute address: 512
Description
1. This instruction is useful in transferring data patterns stored sequentially in memory, to a
single output register location. For example, if the register addresses W100 through W199
contained a set of 100 control patterns (P0 to P99) that needed to be transferred to an output
module located at address R002, the LDR instruction can be used to load the data from the
absolute addresses of W100 to W199 (absolute addresses 612 to 711) into the destination
register R002.
2. In the example below, register W0 is used as the Sr (source) register, which contains the
absolute address of the data patterns to be loaded. Initially, W0 contains 612, which is the
absolute memory address of register W100. As W0 is incremented, it successively points to
the next higher W register to load data from.
3. See Chapter 5, Absolute Address Designation, for a complete table of absolute addresses.
Control
Pattern
Register
(Absolute
Address)
Register
Value
P0
W100 (612)
$22
P1
W101 (613)
$10
P2
W102 (614)
$33
L
L
L
L
L
L
P98
W198 (710)
$05
P99
W199 (711)
$85
Transfer the data of
W100-W199 ($22, $10,
$33,..., $05, $85)
registers in sequence
into R002 output module.
See the following
example.
R002 Output
Module
LDR
D =
Sr =
R
R
DLDR
D =
Sr =
Содержание D320 PLC
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