Comtech EF Data SDM-9000, Инструкция по установке и эксплуатации

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SDM-9000 Satellite Modem Theory of Operation
Rev.4 5–7
5.2.3 Theory of Operation
The modulator PCB is composed of eight basic subsections. The first five subsections
comprise the baseband processing circuits, and the last three form the RF circuits.
Baseband Section Slave processor
Differential encoder
Convolutional encoder
Digital FIR equalizer filter
Analog Nyquist filter
RF Section Quadrature modulator
IF strip
RF synthesizer
The modulator M&C controls all the programmable functions of the module. Fault
information from the modulator is sent to the host M&C. Faults reported include:
•
IF Synthesizer
•
Data Clock Activity
•
Data Clock Synthesizer
•
I Channel Activity
•
Q Channel Activity
•
AGC Level
•
External SCT Synthesizer
•
External Reference Activity
The data for transmission comes from the interface card. The data is first differentially
encoded (QPSK operation), and then convolutional encoding takes place. For QPSK
modulation, processing is done in accordance with IESS-308 for data rates above
10 Mbit/s.
Each of the three encoders output two parallel code bits (referred to as a symbol) from
every data bit input. The encoder is a 7-bit shift register with two modulo-two adders.
The weighting function is an octal number denoting the taps of the shift register that go
to the adders, and are W
0
= 171 and W
1
= 133. The code bits (designated C
0
and C
1
) form
the transmission symbol.
The symbols out of the encoder enable the Viterbi decoder at the other end of the link to
correct received errors. “Puncturing” is used for 3/4 and 7/8 rate encoding. For 3/4 rate,
3 bits input to the encoder generate 6 parallel code bits out, of which 2 are deleted or
“punctured.” For 7/8 rate, 7 bits input to the encoder generate 14 parallel code bits out,
but 6 are deleted.