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42
Chapter 2
E4438C Vector Signal Generator Overview
Rear Panel Overview
EVENT 3
Pin-19 of the Aux I/O connector is used with an internal baseband generator. In arbitrary
waveform mode, this pin outputs a timing signal generated by Marker 3.
The marker 3 output level is +3.3 V CMOS regardless of marker polarity settings.The
reverse damage levels for this connector pin are > +5.5 volts and <
−0.5
volts.
EVENT 4
Pin-18 of the Aux I/O connector is used with an internal baseband generator. In arbitrary
waveform mode, this pin outputs a timing signal generated by Marker 4.
The marker 4 output level is +3.3 V CMOS regardless of marker polarity settings. The
reverse damage levels for this connector pin are > +5.5 volts and <
−0.5
volts.
PATT TRIG IN 2
Pin-17 of the Aux I/O connector accepts a signal that triggers an internal pattern or frame
generator to start single pattern output. Minimum pulse width is 100 ns. Damage levels
are > +5.5 and <
−
0.5 V.
SYM SYNC OUT
Pin-5 of the Aux I/O connector is used with an internal baseband generator. This pin
outputs the CMOS symbol clock for symbol synchronization, one data clock period
wide. Damage levels are > +5.5 volts and <
−0.5
volts.
BER MEAS TRIG/BER
NO DATA
Pin-22 is used for bit error rate testing (Option UN7). Damage levels are > +5.5 volts
and <
−0.5
volts.
BER ERR OUT
Pin-21 is used for bit error rate testing (Option UN7). Damage levels are > +5.5 volts
and <
−0.5
volts
BER TEST OUT
Pin-20 is used for bit error rate testing (Option UN7). Damage levels are > +5.5 volts
and <
−0.5
volts
BER SYNC LOSS
Pin-4 is used for bit error rate testing (Option UN7). Damage levels are > +5.5 volts and
<
−0.5
volts.
BER MEAS END
Pin-1 is used for bit error rate testing (Option UN7). Damage levels are > +5.5 volts and
<
−0.5
volts.
Connector Pin
Description
(Continued)
Содержание E4428C
Страница 22: ...Contents xxii ...
Страница 107: ...Chapter 3 83 Basic Operation Using Security Functions Figure 3 6 ESG Screen with Secure Display Activated ...
Страница 182: ...158 Chapter 4 Basic Digital Operation Using Waveform Clipping Figure 4 22 Rectangular Clipping ...
Страница 183: ...Chapter 4 159 Basic Digital Operation Using Waveform Clipping Figure 4 23 Reduction of Peak to Average Power ...
Страница 224: ...200 Chapter 4 Basic Digital Operation Creating and Using Bit Files ...
Страница 228: ...204 Chapter 5 AWGN Waveform Generator Configuring the AWGN Generator ...
Страница 229: ...205 6 Analog Modulation ...
Страница 276: ...252 Chapter 7 Digital Signal Interface Module Operating the N5102A Module in Input Mode ...
Страница 286: ...262 Chapter 8 Bluetooth Signals Turning On a Bluetooth Signal ...
Страница 287: ...263 9 BERT This feature is available only in E4438C ESG Vector Signal Generators with Option 001 601or 002 602 ...
Страница 330: ...306 Chapter 9 BERT Verifying BERT Operation ...
Страница 366: ...342 Chapter 10 CDMA Digital Modulation IS 95A Modulation ...
Страница 394: ...370 Chapter 12 Multitone Waveform Generator Applying Changes to an Active Multitone Signal ...
Страница 454: ...430 Chapter 15 W CDMA Digital Modulation for Component Test W CDMA Concepts Figure 15 9 Uplink Channel Structure ...
Страница 468: ...444 Chapter 15 W CDMA Digital Modulation for Component Test W CDMA Frame Structures ...
Страница 667: ...643 18 Troubleshooting ...
Страница 700: ...Index 676 Index ...