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Chapter 9
BERT
Bit Error Rate Tester–Option UN7
Bit Error Rate Tester–Option UN7
The bit error rate test (BERT) capability allows you to perform bit error rate (BER) analysis on digital
communications equipment. This enables functional and parametric testing of receivers and components
including sensitivity and selectivity.
Block Diagram
When measuring BER, a clock signal that corresponds to the unit under test (UUT) output data must be
input to the BER CLK IN connector. If the clock is not available from the UUT, use the DATA CLK OUT
signal from the ESG baseband modulator.
Figure 9-18
Clock Gate Function
When you use the clock gate function, the clock signal to the BER CLK IN connector is valid only when the
clock gate signal to the BER GATE IN connector is ON.
Press the
Clock Gate Off On
softkey to toggle the clock gate function off and on.The
Clock Gate Polarity Neg Pos
softkey sets the input polarity of the clock gate signal supplied to the rear panel BER GATE IN connector.
When you select
Pos
(positive), the clock signal is valid when the clock gate signal is high; when you select
Neg
(negative), the clock signal is valid when the clock gate signal is low.
Содержание E4428C
Страница 22: ...Contents xxii ...
Страница 107: ...Chapter 3 83 Basic Operation Using Security Functions Figure 3 6 ESG Screen with Secure Display Activated ...
Страница 182: ...158 Chapter 4 Basic Digital Operation Using Waveform Clipping Figure 4 22 Rectangular Clipping ...
Страница 183: ...Chapter 4 159 Basic Digital Operation Using Waveform Clipping Figure 4 23 Reduction of Peak to Average Power ...
Страница 224: ...200 Chapter 4 Basic Digital Operation Creating and Using Bit Files ...
Страница 228: ...204 Chapter 5 AWGN Waveform Generator Configuring the AWGN Generator ...
Страница 229: ...205 6 Analog Modulation ...
Страница 276: ...252 Chapter 7 Digital Signal Interface Module Operating the N5102A Module in Input Mode ...
Страница 286: ...262 Chapter 8 Bluetooth Signals Turning On a Bluetooth Signal ...
Страница 287: ...263 9 BERT This feature is available only in E4438C ESG Vector Signal Generators with Option 001 601or 002 602 ...
Страница 330: ...306 Chapter 9 BERT Verifying BERT Operation ...
Страница 366: ...342 Chapter 10 CDMA Digital Modulation IS 95A Modulation ...
Страница 394: ...370 Chapter 12 Multitone Waveform Generator Applying Changes to an Active Multitone Signal ...
Страница 454: ...430 Chapter 15 W CDMA Digital Modulation for Component Test W CDMA Concepts Figure 15 9 Uplink Channel Structure ...
Страница 468: ...444 Chapter 15 W CDMA Digital Modulation for Component Test W CDMA Frame Structures ...
Страница 667: ...643 18 Troubleshooting ...
Страница 700: ...Index 676 Index ...