VC7203 GTX Transceiver Characterization Board
23
UG957 (v1.0) October 10, 2012
Detailed Description
Information for each GTX transceiver pin is shown in
.
X-Ref Target - Figure 1-11
Figure 1-11:
A – GTX Connector Pad. B – GTX Connector Pinout
Table 1-13:
GTX Transceiver Pins
U1 FPGA Pin
Net Name
Quad
Connector
Trace Length
(mils)
Y2
115_TX0_P
115
J83
2,805
Y1
115_TX0_N
115
J83
2,806
AA4
115_RX0_P
115
J83
2,898
AA3
115_RX0_N
115
J83
2,898
V2
115_TX1_P
115
J83
2,525
V1
115_TX1_N
115
J83
2,523
Y6
115_RX1_P
115
J83
2,489
Y5
115_RX1_N
115
J83
2,489
U4
115_TX2_P
115
J83
2,549
U3
115_TX2_N
115
J83
2,549
W4
115_RX2_P
115
J83
2,308
W3
115_RX2_N
115
J83
2,309
T2
115_TX3_P
115
J83
2,840
T1
115_TX3_N
115
J83
2,840
V6
115_RX3_P
115
J83
2,933
V5
115_RX3_N
115
J83
2,933
P2
116_TX0_P
116
J84
2,677
P1
116_TX0_N
116
J84
2,677
UG957_c1_11_100712
B
GTX
GTX Connector Pino
u
t
P
P
P
P
P
P
P
P
P
P
N
N
N
N
N
N
N
N
N
N
RX1
TX1
TX2
RX2
TX0
CLK1
RX
3
TX
3
CLK0
RX0
A
GTX Connector P
a
d
