VC7203 GTX Transceiver Characterization Board
57
UG957 (v1.0) October 10, 2012
VC7203 Board UCF Listing
NET CM_CTRL_20 LOC = F20 | IOSTANDARD=LVCMOS18; # Bank 38
NET CM_CTRL_21 LOC = E20 | IOSTANDARD=LVCMOS18; # Bank 38
NET CM_CTRL_22 LOC = K17 | IOSTANDARD=LVCMOS18; # Bank 38
NET CM_CTRL_23 LOC = J17 | IOSTANDARD=LVCMOS18; # Bank 38
NET CM_RST LOC = J20 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L17N_T2_38 LOC = H20 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L18P_T2_38 LOC = H18 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L18N_T2_38 LOC = G17 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L19P_T3_38 LOC = P18 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L19N_T3_VREF_38 LOC = P17 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L20P_T3_38 LOC = M17 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L20N_T3_38 LOC = L17 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L21P_T3_DQS_38 LOC = N19 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L21N_T3_DQS_38 LOC = N18 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L22P_T3_38 LOC = M19 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L22N_T3_38 LOC = M18 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L23P_T3_38 LOC = P20 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L23N_T3_38 LOC = N20 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L24P_T3_38 LOC = L20 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_L24N_T3_38 LOC = L19 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_25_VRP_38 LOC = K20 | IOSTANDARD=LVCMOS18; # Bank 38
NET IO_0_VRN_39 LOC = J16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA11_P LOC = C16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA11_N LOC = B16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA12_P LOC = B14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA12_N LOC = A14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA13_P LOC = C15 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA13_N LOC = C14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA14_P LOC = D13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA14_N LOC = C13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA15_P LOC = D16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HA15_N LOC = D15 | IOSTANDARD=LVCMOS18; # Bank 39
NET CM_LVDS1_P LOC = E12 | IOSTANDARD=LVDS; # Bank 39
NET CM_LVDS1_N LOC = D12 | IOSTANDARD=LVDS; # Bank 39
NET FMC3_HB01_P LOC = F16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB01_N LOC = E15 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB02_P LOC = E14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB02_N LOC = E13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB03_P LOC = H16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB03_N LOC = G16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB04_P LOC = G12 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB04_N LOC = F12 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB06_CC_P LOC = F15 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB06_CC_N LOC = F14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB00_CC_P LOC = G14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB00_CC_N LOC = G13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_CLK2_BIDIR_P LOC = H15 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_CLK2_BIDIR_N LOC = H14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_CLK3_BIDIR_P LOC = J13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_CLK3_BIDIR_N LOC = H13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB05_P LOC = K12 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB05_N LOC = J12 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB07_P LOC = K15 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB07_N LOC = J15 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB08_P LOC = K14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB08_N LOC = K13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB09_P LOC = L16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB09_N LOC = L15 | IOSTANDARD=LVCMOS18; # Bank 39
NET CM_LVDS2_P LOC = L12 | IOSTANDARD=LVDS; # Bank 39
NET CM_LVDS2_N LOC = L11 | IOSTANDARD=LVDS; # Bank 39
NET FMC3_HB10_P LOC = M14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB10_N LOC = L14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB11_P LOC = N16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB11_N LOC = M16 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB12_P LOC = N13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB12_N LOC = M13 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB13_P LOC = N15 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB13_N LOC = N14 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB14_P LOC = M12 | IOSTANDARD=LVCMOS18; # Bank 39
NET FMC3_HB14_N LOC = M11 | IOSTANDARD=LVCMOS18; # Bank 39
NET IO_25_VRP_39 LOC = J11 | IOSTANDARD=LVCMOS18; # Bank 39
NET 111_TX3_P LOC = AW2 ; # Bank 111
NET 111_RX3_P LOC = AW6 ; # Bank 111
NET 111_TX3_N LOC = AW1 ; # Bank 111
NET 111_RX3_N LOC = AW5 ; # Bank 111
NET 111_TX2_P LOC = AY4 ; # Bank 111
NET 111_RX2_P LOC = AY8 ; # Bank 111
NET 111_TX2_N LOC = AY3 ; # Bank 111
NET 111_REFCLK0_P LOC = AW10 ; # Bank 111
NET 111_RX2_N LOC = AY7 ; # Bank 111
NET 111_REFCLK0_N LOC = AW9 ; # Bank 111
