52
VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012
Appendix C:
Master UCF Listing
NET CLK_DIFF_2_N LOC = K40 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L13P_T2_MRCC_19 LOC = L39 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L13N_T2_MRCC_19 LOC = L40 | IOSTANDARD=LVCMOS18; # Bank 19
NET DUT_I2C_SCL LOC = M41 | IOSTANDARD=LVCMOS18; # Bank 19
NET DUT_I2C_SDA LOC = L41 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L15P_T2_DQS_19 LOC = K42 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L15N_T2_DQS_19 LOC = J42 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L16P_T2_19 LOC = M42 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L16N_T2_19 LOC = L42 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L17P_T2_19 LOC = K37 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L17N_T2_19 LOC = K38 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L18P_T2_19 LOC = M36 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L18N_T2_19 LOC = L37 | IOSTANDARD=LVCMOS18; # Bank 19
NET USER_PB1 LOC = P41 | IOSTANDARD=LVCMOS18; # Bank 19
NET USER_PB2 LOC = N41 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED1 LOC = M37 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED2 LOC = M38 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED3 LOC = R42 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED4 LOC = P42 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED5 LOC = N38 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED6 LOC = M39 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED7 LOC = R40 | IOSTANDARD=LVCMOS18; # Bank 19
NET APP_LED8 LOC = P40 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L24P_T3_19 LOC = N39 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_L24N_T3_19 LOC = N40 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_25_VRP_19 LOC = N36 | IOSTANDARD=LVCMOS18; # Bank 19
NET IO_0_VRN_31 LOC = AM14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA02_P LOC = AJ16 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA02_N LOC = AJ15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA03_P LOC = AK14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA03_N LOC = AK13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA04_P LOC = AK15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA04_N LOC = AL14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA05_P LOC = AJ13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA05_N LOC = AJ12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA06_P LOC = AL16 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA06_N LOC = AL15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA07_P LOC = AK12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA07_N LOC = AL12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA08_P LOC = AM13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA08_N LOC = AN13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA09_P LOC = AM12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA09_N LOC = AM11 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA10_P LOC = AN15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA10_N LOC = AN14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA11_P LOC = AN11 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA11_N LOC = AP11 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA01_CC_P LOC = AR14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA01_CC_N LOC = AT14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA00_CC_P LOC = AP13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA00_CC_N LOC = AR13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA00_CC_P LOC = AU14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA00_CC_N LOC = AU13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA01_CC_P LOC = AV13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA01_CC_N LOC = AW13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA12_P LOC = AP12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA12_N LOC = AR12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA13_P LOC = AR15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA13_N LOC = AT15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA14_P LOC = AT12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA14_N LOC = AU12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA15_P LOC = AV15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA15_N LOC = AV14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA16_P LOC = AW15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_LA16_N LOC = AY15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA02_P LOC = AW12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA02_N LOC = AY12 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA03_P LOC = BA15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA03_N LOC = BA14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA04_P LOC = AY14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA04_N LOC = AY13 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA05_P LOC = BB14 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_HA05_N LOC = BB13 | IOSTANDARD=LVCMOS18; # Bank 31
NET CM_LVDS3_P LOC = BA12 | IOSTANDARD=LVDS; # Bank 31
NET CM_LVDS3_N LOC = BB12 | IOSTANDARD=LVDS; # Bank 31
NET IO_25_VRP_31 LOC = AP15 | IOSTANDARD=LVCMOS18; # Bank 31
NET FMC3_PRSNT_M2C_L LOC = AR20 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA19_P LOC = AL19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA19_N LOC = AM19 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA20_P LOC = AK17 | IOSTANDARD=LVCMOS18; # Bank 32
NET FMC3_LA20_N LOC = AL17 | IOSTANDARD=LVCMOS18; # Bank 32
