Xilinx VC7203, User Manual

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6 www.xilinx.com VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012
Chapter 1: VC7203 Board Features and Operation
The VC7203 board block diagram is shown in Figure 1-1 .
Detailed Description
Figure 1-2 shows the VC7203 board described in this user guide. Each numbered feature
that is referenced in Figure 1-2 is described in the sections that follow.
Caution!
The VC7203 board can be damaged by electrostatic discharge (ESD). Follow standard
ESD prevention measures when handling the board.
Caution!
Do not remove the rubber feet from the board. The feet provide clearance to prevent short
circuits on the back side of the board.
Note:
Figure 1-2 is for reference only and might not reflect the current revision of the board.
X-Ref Target - Figure 1-1
Figure 1-1: VC7203 Board Block Diagram
UG957_c1_01_090512
FPGA Power S o u rce
On- b o a rd Reg u l a tion:
Bo a rd Utility Power
On- b o a rd Reg u l a tion:
P us h B u tton s ,
DIP S witche s ,
a nd LED s
Su perClock-2 Mod u le
Interf a ce
GTX Tr a n s ceiver s
Virtex-7 FPGA
XC7K485T- 3 FFG1761E
S elect I/O Termin a tion
a nd VTT J a ck s
An a log/Digit a l
Converter (XADC)
FMC1 Interf a ce
High-Perform a nce I/O
U S B to UART
Bridge
FMC2 Interf a ce
High-Perform a nce I/O
I
2
C B us
M a n a gement
7 S erie s
GTX Power Mod u le
Interf a ce
12V
PMB us
5V
3 . 3 V
U s er Clock s
S y s tem ACE S D
Controller
Power In
12V
DC
PMB us
VCCINT 1.0V, 20A
VCCBRAM 1.0V, 10A
VCCAUX 1.8V, 10A
VCCAUX_IO 1.8V, 10A
VCCO_HP 1.8V, 10A
VCCO_HR 1.8V, 10A
VCCO_0 2.5V, 7.5A
5.0V, 10A
3 . 3 V, 18A
2.5V, 18A
GTX
Power Monitoring
VCCO_HR
5V
3 . 3 V
2.5V
FMC 3 Interf a ce
High-R a nge I/O
1
Note s
1. GTX Tr a n s ceiver QUAD 111, QUAD 112,
a nd the FMC 3 interf a ce a re not a v a il ab le
with the XC7V485T device.
QUAD 111
1
QUAD 112
1
QUAD 11 3
QUAD 114
QUAD 115
QUAD 116
QUAD 117
QUAD 118
QUAD 119