54
VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012
Appendix C:
Master UCF Listing
NET IO_L18N_T2_33 LOC = AV24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L19P_T3_33 LOC = AY23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L19N_T3_VREF_33 LOC = AY22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L20P_T3_33 LOC = AY25 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L20N_T3_33 LOC = BA25 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L21P_T3_DQS_33 LOC = BA22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L21N_T3_DQS_33 LOC = BB22 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L22P_T3_33 LOC = AY24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L22N_T3_33 LOC = BA24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L23P_T3_33 LOC = BA21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L23N_T3_33 LOC = BB21 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L24P_T3_33 LOC = BB24 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_L24N_T3_33 LOC = BB23 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_25_VRP_33 LOC = AN20 | IOSTANDARD=LVCMOS18; # Bank 33
NET IO_0_VRN_34 LOC = R29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA02_P LOC = K35 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA02_N LOC = J35 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA03_P LOC = J32 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA03_N LOC = J33 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA04_P LOC = K33 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA04_N LOC = K34 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA05_P LOC = L34 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA05_N LOC = L35 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA06_P LOC = M33 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA06_N LOC = M34 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA07_P LOC = H34 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA07_N LOC = H35 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA08_P LOC = K29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA08_N LOC = K30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA09_P LOC = J30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA09_N LOC = H30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA10_P LOC = L29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA10_N LOC = L30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA11_P LOC = J31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA11_N LOC = H31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA01_CC_P LOC = M32 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA01_CC_N LOC = L32 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA00_CC_P LOC = L31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA00_CC_N LOC = K32 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA00_CC_P LOC = N30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA00_CC_N LOC = M31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA01_CC_P LOC = P30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA01_CC_N LOC = N31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA12_P LOC = M28 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA12_N LOC = M29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA13_P LOC = R28 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA13_N LOC = P28 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA14_P LOC = N28 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA14_N LOC = N29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA15_P LOC = R30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA15_N LOC = P31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA16_P LOC = U31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_LA16_N LOC = T31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA02_P LOC = V30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA02_N LOC = V31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA03_P LOC = T29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA03_N LOC = T30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA04_P LOC = W30 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA04_N LOC = W31 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA05_P LOC = V29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA05_N LOC = U29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA06_P LOC = Y29 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_HA06_N LOC = Y30 | IOSTANDARD=LVCMOS18; # Bank 34
NET IO_25_VRP_34 LOC = U28 | IOSTANDARD=LVCMOS18; # Bank 34
NET FMC2_PRSNT_M2C_L LOC = G31 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA19_P LOC = B36 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA19_N LOC = A37 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA20_P LOC = B34 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA20_N LOC = A34 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA21_P LOC = B39 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA21_N LOC = A39 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA22_P LOC = A35 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA22_N LOC = A36 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA23_P LOC = C38 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA23_N LOC = C39 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA24_P LOC = B37 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA24_N LOC = B38 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA25_P LOC = E32 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA25_N LOC = D32 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA26_P LOC = B32 | IOSTANDARD=LVCMOS18; # Bank 35
NET FMC2_LA26_N LOC = B33 | IOSTANDARD=LVCMOS18; # Bank 35
