W632GU6NB
Publication Release Date: Aug. 20, 2018
Revision: A01
- 69 -
The use of Self-Refresh mode introduces the possibility that an internally timed refresh event can be
missed when CKE is raised for exit from Self-Refresh mode. Upon exit from Self-Refresh, the DDR3L
SDRAM requires a minimum of one extra refresh command before it is put back into Self-Refresh
Mode.
T0
T1
T2
Ta0
Tb0
Tc0
Tc1
Td0
CK#
CK
Command
Tf0
Te0
VALID
VALID
VALID
NOP
SRE
NOP
NOP
*1
VALID
*2
VALID
*3
SRX
VALID
VALID
t
RP
ODTL
t
XSDLL
t
XS
t
IS
t
IS
t
CPDED
t
CKESR
t
CKSRE
t
CKSRX
Enter Self Refresh
Exit Self Refresh
CKE
ODT
Address
TIME BREAK
DON'T CARE
Notes:
1. Only NOP or DES command.
2. Valid commands not requiring a locked DLL.
3. Valid commands requiring a locked DLL.
Figure 58
– Self-Refresh Entry/Exit Timing