VXI Technology, Inc.
42
SMP7500 Programming
CONTROL REGISTER BUSYN SELECT(continued)- Read and Write
D8-D10
BUSYN Select for PORT F/P
CLKs 6 thru 11
Value
Clock selected
0
F/P CLK 6
1
F/P CLK 7
2
F/P CLK 8
3
F/P CLK 9
4
F/P CLK 10
5
F/P CLK 11
6
Relay Register Write Event MUX
7
BUSYN Delay Timer
These bits select the F/P CLK Lines 6 thru 11, as well as the Relay
Register Write Event MUX or BUSYN Delay Timer that produce the
“BUSYN” output pulse. This BUSYN output may then be selected to
drive the various TTL Trigger Lines in the system. See the Board Busy,
Interrupt Control and Busy Trigger Control Register descriptions for the
A16 address space.
Pon state = 0
D11
BUSYN Polarity Select for
PORT F/P CLKs 6 thru 11
Set to 0 for non-inverted Clock to Input Port operation.
Set to 1 for inverted Clock to Input Port operation.
Pon state = 0
D12
BUSYN Enable for PORT
F/P CLKs 6 thru 11
Set to 0 to disable BUSYN generation for Port F/P CLKs 6 thru 11.
Set to 1 to enable BUSYN generation for Port F/P CLKs 6 thru 11.
Pon state = 0
D13-D15
Unused
These bits are unused.
CONTROL REGISTER BUSYN DELAY TIMER - Read and Write
D15-D0
BUSYN Delay Timer
When using the BUSYN Delay Timer, this register is used to set the
time that the plug-in module will time before producing a Board Busy
(BUSYN) active pulse. The Board Busy Delay Timer is set every time
the plug-in receives a Write to a relevant Relay Register memory space.
This includes writes to all of the ports and the Relay Register Write
Event Register address X000C. The Board Busy signal will be removed
at the end of the time out that is set by the value contained in this
register. For each count loaded into this register, the Board Busy signal
will be held active for 1
µ
s. The delay may be set from 0 to
approximately 65 ms, thus accommodating a wide variation in test
station requirements.
When using the BUSYN Delay Timer, the Board Busy signal may be
monitored by the user, in either a polled or an interrupt fashion, and is to
be used as an indication that the BUSYN Delay Timer has timed out.
Alternatively, the Board Busy signal may also be used to drive the TTL
Trigger Bus. See the Board Busy, Interrupt Control and Busy Trigger
Control Register descriptions in the A16 address space.
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