Advisory
INTOSC: VDDIO Powered Without VDD Can Cause INTOSC Frequency Drift
Revisions Affected
0, A, B
Details
The "D" revision of the
TMS320F28004x Real-Time Microcontrollers
data sheet
(SPRS945D) has updated power sequencing requirements. Revision "C" and earlier
revisions of the data sheet did not require VDDIO and VDD to be powered on and
powered off at the same time when using an external supply source for VDD.
If VDDIO is powered on while VDD is not powered, there will be an accumulating
and persistent downward frequency drift for INTOSC1 and INTOSC2. The rate of drift
accumulated will be greater when VDDIO is powered without VDD at high temperatures.
As a result of this drift, the INTOSC1 and INTOSC2 internal oscillator frequencies could
fall below the minimum values specified in the data sheet. This would impact applications
using INTOSC2 as the clock source for the PLL, with the system operating at a lower
frequency than expected.
Workarounds
1. Use the internal VREG or internal DCDC, which will ensure VDD is powered when
VDDIO is present.
2. When using an external VDD source, always keep VDDIO and VDD powered
together.
3. Use the external X1 and X2 crystal oscillators as the PLL clock source. The crystal
oscillator does not have any drift related to VDDIO and VDD supply sequencing.
Silicon Revision B Usage Notes and Advisories
SPRZ439G – JANUARY 2017 – REVISED AUGUST 2022
TMS320F28004x Real-Time MCUs Silicon Errata
Silicon Revisions B, A, 0
25
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