Texas Instruments TMS320F28004 Series, Manual

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1 Usage Notes and Advisories Matrices
Table 1-1 lists all usage notes and the applicable silicon revisions. Table 1-2 lists all advisories, modules
affected, and the applicable silicon revisions.
1.1 Usage Notes Matrix
Table 1-1. Usage Notes Matrix
NUMBER TITLE
SILICON REVISIONS
AFFECTED
0 A B
Section 3.1.1 PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU
Interrupt Mask Clear Yes Yes Yes
Section 3.1.2 FPU32 and VCU Back-to-Back Memory Accesses Yes Yes Yes
Section 3.1.3 Caution While Using Nested Interrupts Yes Yes Yes
1.2 Advisories Matrix
Table 1-2. Advisories Matrix
MODULE DESCRIPTION
SILICON REVISIONS
AFFECTED
0 A B
FPU FPU: FPU-to-CPU Register Move Operation Preceded by Any FPU 2p Operation Yes Yes Yes
SDFM SDFM: Dynamically Changing Threshold Settings (LLT, HLT), Filter Type, or COSR
Settings Will Trigger Spurious Comparator Events Yes Yes Yes
SDFM SDFM: Dynamically Changing Data Filter Settings (Such as Filter Type or DOSR)
Will Trigger Spurious Data Acknowledge Events Yes Yes Yes
SDFM SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL,
CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM
State Machine, Resulting in Spurious Comparator Events Yes Yes Yes
SDFM SDFM: Manchester Mode (Mode 2) Does Not Produce Correct Filter Results Under
Several Conditions Yes Yes Yes
eQEP eQEP: Position Counter Incorrectly Reset on Direction Change During Index Yes Yes Yes
eQEP eQEP: eQEP Inputs in GPIO Asynchronous Mode Yes Yes Yes
V
DD
Supply: V
DD
Supply: During V
DDIO
Power Up, V
DD
May Also Rise Yes Yes Yes
eCAP eCAP: HRFRC is Not EALLOW-Protected Yes Yes Yes
PLL PLL: PLL May Not Lock on the First Lock Attempt Yes Yes Yes
LPM LPM: STANDBY Low-Power Mode is Not Supported Yes Yes Yes
DCC DCC: Single-Shot-Mode Operation May End Prematurely Yes Yes Yes
BOR BOR: VDDIO Between 2.45 V and 3.0 V can Result in Multiple XRSn Pulses Yes Yes Yes
I2C I2C: SDA and SCL Open-Drain Output Buffer Issue Yes Yes Yes
ePWM ePWM: An ePWM Glitch can Occur if a Trip Remains Active at the End of the
Blanking Window Yes Yes Yes
ePWM ePWM: Trip Events Will Not be Filtered by the Blanking Window for the First 3 Cycles
After the Start of a Blanking Window Yes Yes Yes
ePWM ePWM: Event Latch (DCxEVTxLAT) of "DC Event-Based CBC Trip" May not Extend
Trigger Pulse as Expected When Asynchronous Path is Selected Yes – –
INTOSC INTOSC: VDDIO Powered Without VDD Can Cause INTOSC Frequency Drift Yes Yes Yes
FSI FSI: RX FIFO Spurious Overrun Yes Yes Yes
During DCAN FIFO Mode, Received Messages May be Placed Out of Order in the
FIFO Buffer Yes Yes Yes
Boot ROM Boot ROM: Calling SCI Bootloader from Application Yes Yes Yes
Boot ROM, MPOST Boot-ROM, MPOST: Longer Boot Time With MPOST Enabled Yes Yes Yes
Memory Memory: Prefetching Beyond Valid Memory Yes Yes Yes
SYSTEM SYSTEM: Multiple Successive Writes to CLKSRCCTL1 Can Cause a System Hang Yes Yes Yes
Usage Notes and Advisories Matrices www.ti.com
2 TMS320F28004x Real-Time MCUs Silicon Errata
Silicon Revisions B, A, 0 SPRZ439G – JANUARY 2017 – REVISED AUGUST 2022
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