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Individual Instruction Descriptions
4-138
4.14.43
MULSPL
Multiply and Subtract PL From Accumulator
Syntax
[label]
name
dest, src [, mod]
Clock, clk
Word, w
With RPT, clk
Class
MULSPL
An, {adrs}
Table 4–46
Table 4–46
1b
MULSPL
An[~], An[~] [, next A]
1
1
n
R
+3
3
Execution
[premodify AP if mod specified]
PH,PL
⇐
MR * src
dest
⇐
dest – PL
PC
⇐
PC + 1
Flags Affected
OF, SF, ZF, CF are set accordingly
src is {adrs}:
TAG bit is set accordingly
Opcode
Instructions
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MULSPL An, {adrs}
0
1
1
1
1
1
1
An
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
MULSPL An[~], An[~], [next A]
1
1
1
0
0
next A
An
1
1
0
0
0
0
A~
~A
Description
Perform multiplication of multiply register (MR) and value of src. The 16 MSBs
of the 32-bit product are stored in the product high (PH) register. The 16 LSBs
of the product (contained in product low (PL) register) are subtracted from
dest. Certain restrictions apply to the use of this instruction when interrupts are
occuring in the background. See Section 4.8 for more details.
Syntax
Description
MULSPL {adrs}
Multiply MR by RAM word, substract PL to An
MULSPL An[~], An[~] [, next A]
Multiply MR by An[~] word, substract PL to An[~]
See Also
MULSPLS, MULTPL, MULTPLS, MULAPL, MULAPLS
Example 4.14.43.1
MULSPL A0, *R3++
Multiply MR with the contents of R3, subtract PL from accumulator A0. and store result in accumulator
A0 post-increment. Post-increment R3 by 2.
Example 4.14.43.2
MULSPL A2, A2~, ––A
Predecrement accumulator pointer AP2. Multiply MR register to accumulator A2~, subtract PL from
accumulator A2, and store result to accumulator A2.
Summary of Contents for MSP50C6xx
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