Instruction Set Encoding
4-191
Assembly Language Instructions
Instructions
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
JMP pma16, Rx––
1
0
0
0
0
0
0
1
0
1
0
1
Rx
1
0
x
pma16
JMP pma16, Rx++R5
1
0
0
0
0
0
0
1
0
1
0
1
Rx
1
1
x
pma16
JMP *An
1
0
0
0
1
0
0
An
0
0
0
0
0
0
0
0
Jcc pma16
1
0
0
0
0
0
Not
cc
0
0
0
0
0
x
pma16
Jcc pma16, Rx++
1
0
0
0
0
0
Not
cc
Rx
0
1
x
pma16
Jcc pma16, Rx––
1
0
0
0
0
0
Not
cc
Rx
1
0
x
pma16
Jcc pma16, Rx++R5
1
0
0
0
0
0
Not
cc
Rx
1
1
x
pma16
MOV {adrs}, An[~] [, next A]
0
0
1
1
A~
next A
An
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
MOV An[~], {adrs} [, next A]
0
0
1
0
A~
next A
An
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
MOV {adrs}, *An
0
1
0
1
1
1
0
An
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
MOV An[~], imm16 [, next A]
1
1
1
0
0
next A
An
0
0
1
0
0
1
0
~A
MOV MR, imm16 [, next A]
1
1
1
0
0
next A
An
1
1
1
0
0
1
0
0
MOV An, An~ [, next A]
1
1
1
0
0
next A
An
0
0
1
1
1
0
A~
~A
MOV An[~], PH [, next A]
1
1
1
0
0
next A
An
0
1
1
1
0
0
A~
~A
MOV SV, An[~] [, next A]
1
1
1
0
0
next A
An
1
0
1
0
0
0
A~
0
MOV PH, An[~] [, next A]
1
1
1
0
0
next A
An
1
0
1
0
1
0
A~
0
MOV An[~], *An[~] [, next A]
1
1
1
0
0
next A
An
0
0
0
1
0
0
A~
~A
MOV MR, An[~] [, next A]
1
1
1
0
0
next A
An
1
0
1
1
0
0
A~
0
MOV {adrs}, Rx
1
1
1
1
0
0
Rx
{adrs}
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
MOV Rx, {adrs}
1
1
1
1
0
1
Rx
{adrs}
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
MOV Rx, imm16
1
1
1
1
1
1
1
0
0
0
1
0
Rx
0
0
MOV Rx, R5
1
1
1
1
1
1
1
0
0
1
1
0
Rx
0
0
MOV SV, imm4
1
1
1
1
1
1
0
1
0
0
0
0
0
imm4
MOV SV, {adrs}†
1
1
0
1
1
0
0
0
0
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
† Signed multiplier mode resets UM (bit 1 in status register ) to 0
Summary of Contents for MSP50C6xx
Page 6: ...vi...
Page 14: ...xiv...
Page 24: ...1 10...
Page 296: ...Instruction Set Summay 4 210 Assembly Language Instructions...
Page 366: ...6 12...