Instruction Classification
4-31
Assembly Language Instructions
between the accumulator and the MR, SV, or PH register. As with all accumula-
tor referenced instructions, string operations are possible as well as premodi-
fication of one of 4 indirectly referenced accumulator pointer registers (AP).
Table 4–19. Class 3 Instruction Encoding
Bit
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Class 3
1
1
1
0
0
next A
An
C3
0
A~
~A
Table 4–20. Class 3 Instruction Description
C3
Mnemonic
Description
0
0
0
0
0
NEGAC An[~], An[~] [, next A]
NEGACS An[~], An[~]
Store the 2’s complement of the source accumulator
(A~=0 or 1) to the destination accumulator (~A=0 or 1).
ALU status is modified.
0
0
0
0
1
NOTAC An[~], An[~] [, next A]
NOTACS An[~], An[~]
Place the 1’s complement of the source accumulator
(A~=0 or 1) into the destination accumulator (~A=0 or 1).
ALU status is modified.
0
0
0
1
0
MOV An[~], *An[~] [, next A]
MOVS An[~], *An[~]
Look up a value in program memory addressed by
accumulator (A~=0 or 1). Place the lookup value into the
accumulator (~A=0 or 1). The lookup address is
post–incremented in the DP register. ALU status is
modified based on the lookup value.
0
0
0
1
1
ZAC An[~] [, next A]
ZACS An[~]
Zero accumulator (~A=0 or 1). ALU status is modified.
0
0
1
0
0
SUB An[~], An, An~ [, next A]
SUB An[~], An~, An [, next A]
SUBS An[~], An, An~
SUBS An[~], An~, An
Subtract offset accumulator from accumulator (A~=0) or
subtract accumulator from offset accumulator (A~=1).
Store the result in accumulator (~A=0 or 1). ALU status is
modified.
0
0
1
0
1
ADD An[~], An~, An [, next A]
ADDS An[~], An~, An
Add accumulator to offset accumulator and store result to
accumulator (~A=0 or 1). ALU status is modified.
0
0
1
1
0
SHLAC An[~], An[~] [, next A]
SHLACS An[~], An[~]
Shift accumulator left 1 bit and store the result into
accumulator(~A=0) or offset accumulator (~A=1). The
LSB is set to zero and the MSB is stored in a carryout
status bit. ALU status is modified.
0
0
1
1
1
MOV An, An~ [, next A]
MOVS An, An~
Copy accumulator (A~=0 or 1) to accumulator (~A=0 or 1).
ALU status is modified.
† These instructions have a special 1 word string operations when string mode is selected. The instructions ignore the string count,
executing only once but maintain the carry and comparison to zero operation of the previous arithmetic operation as if the
sequence of the previous string instruction and this instruction execution was a part of a larger string operation.
Summary of Contents for MSP50C6xx
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Page 296: ...Instruction Set Summay 4 210 Assembly Language Instructions...
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