Individual Instruction Descriptions
4-166
4.14.70
SHLAPLS
Shift Left String With Accumulate
Syntax
[label]
name
dest, src
Clock, clk
Word, w
With RPT, clk
Class
SHLAPLS
An, {adrs}
Table 4–46
Table 4–46
1b
SHLAPLS
An[~], An[~]
n
S
+3
1
n
R
+3
3
Execution
PH, PL
⇐
src << SV
dest
⇐
dest + PL
PC
⇐
PC + 1
Flags Affected
OF, SF, ZF, CF are set accordingly
src is {adrs}:
TAG bit is set accordingly
Opcode
Instructions
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SHLAPLS An, {adrs}
0
1
1
1
1
0
1
An
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
SHLAPLS An[~], An[~]
1
1
1
0
0
1
1
An
1
1
1
0
1
0
A~
~A
Description
Shift accumulator string or data memory string pointed by {adrs} to left n
SV
bits
(as specified by the SV register). The result is zero-filled on the right and either
zero-filled or sign-extended on the left (based on the setting of the extended
sign mode (XM) bit in the status register). The upper 16 bits are latched into
the product high (PH) register. The lower 16 bits of the result [product low (PL)
register]) are added to the destination accumulator (or its offset). This
instruction propagates the shifted bits to the next accumulators in the string.
Syntax
Description
SHLAPLS An, {adrs}
Shift data memory string left, add PL to An
SHLAPLS An[~], An[~]
Shift An[~] string left, addb PL to An[~]
See Also
SHLAPL , SHLTPL , SHLTPLS, SHLSPL, SHLSPLS
Example 4.14.70.1
SHLAPLS A0, *R4++R5
Shift the string pointed by the byte address stored in R4 by n
SV
bits to the left, add the shifted value (PL)
with accumulator string, and store the result in accumulator string A0. Add R5 to R4 and store result
in R4. PH holds the upper 16 bits of the shift.
Example 4.14.70.2
SHLAPLS A2, *R1++
Shift the string pointed by the byte address stored in R1 by n
SV
bits to the left, add the shifted value (PL)
with accumulator string, the accumulator, and store the result in accumulator string A2. Increment R1
(by 2). PH holds the upper 16 bits of the shift.
Example 4.14.70.3
SHLAPLS A1, A1
Shift the accumulator string A1 by n
SV
bits to the left, add the shifted value (PL) to the accumulator and
store the result in accumulator string A1. After execution PH contains the upper 16 bits of the 32-bit shift.
Summary of Contents for MSP50C6xx
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