Texas Instruments MSP50C6xx, User Manual

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Individual Instruction Descriptions
4-183 Assembly Language Instructions
4.14.85 XOR Logical XOR
Syntax
[label] name dest, src, src1 [, mod] Clock, clk Word, w With RPT, clk Class
XOR An, {adrs} Table 4–46 Table 4–46 1a
XOR An[~], An[~], imm16 [, next A] 2 2 N/R 2b
XOR An[~], An~, An [, next A] 1 1 n
R
+3 3
XOR TFn, {flagadrs} 1 1 N/R 8a
XOR TFn, {cc} [, Rx] 1 1 n
R
+3 8b
Execution [premodify AP if mod specified]
dest
⇐
dest XOR src (for two operands)
dest
⇐
src1 XOR src (for three operands)
PC
⇐
PC + w
Flags Affected dest is An: OF, SF, ZF, CF are set accordingly
dest is TFn: TFn bits in STAT register are set accordingly
src is {adrs}: TAG bit is set accordingly
src is {flagadrs}: TAG bit is set accordingly
Opcode
Instructions 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
XOR An, {adrs} 0 1 0 0 1 0 0 An adrs
x dma16 (for direct) or offset16 (long relative) [see section 4.13]
XOR An[~], An[~], imm16 [, next A] 1 1 1 0 0 next A An 1 1 0 0 0 1 A~ ~A
XOR An[~], An~, An [, next A] 1 1 1 0 0 next A An 0 1 0 0 0 0 A~ ~A
XOR TFn, {flagadrs} 1 0 0 1 1 fig Not 1 1 0 flagadrs
XOR TFn, {cc} [, Rx] 1 0 0 1 0 fig Not cc Rx 1 1
Description Bitwise logical XOR of src and dest. Result is stored in dest. If three operands
are specified, then logical XOR src and src1, store the result in dest. Pre-
modification of accumulator pointers is allowed with some operand types.
Syntax Description
XOR An, {adrs} XOR RAM word to An
XOR An[~], An[~], imm16 [, next A] XOR immediate word to An[~], store result in An[~]
XOR An[~], An~, An [, next A] XOR An word to An~ word, store result in An[~]
XOR TFn, {flagadrs} XOR TFn (either TF1 or TF2) with memory tag, store result in TFn bit in
STAT
XOR TFn, {cc} [, Rx] XOR test condition with TFn (either TF1 or TF2) bit in STAT register. Rx
must be provided if cc is one of {RZP, RNZP, RLZP, RNLZP} to check if
the selected Rx is zero or negative. Rx should not be provided for other
conditionals.