SN8P2977
8-Bit Micro-Controller with Regulator, PGIA, 24-bit ADC
SONiX TECHNOLOGY CO., LTD
Page 87
Version 1.7
9.3 UART TRANSFER FORMAT
The UART also builds in “Busy Bit” to indicate UART bus status. URXBZ bit is UART RX operation indicator. UTXBZ bit
is UART TX operation indicator. If bus is transmitting
, the busy bit is “1” status. If bus is finishing operation or in idle
status, the busy bit is “0” status.
UART TX
operation is controlled by loading UTXD data buffer. After UART TX configuration, load transmitted data into
UTXD 8-bit buffer, and then UART starts to transmit the pocket following UART TX configuration.
UART RX
operation is controlled by receiving the start bit from master terminal. After UART RX configuration, URX pin
detects the falling edge of start bit, and then UART starts to receive the pocket from master terminal.
UART provides URXPC bit and UFMER bit to check received pocket. URXPC bit is received parity bit checker. If
received parity is error, URXPC sets as “1”. If URXPC bit is zero after receiving pocket, the parity is correct. UFMER bit
is received stream frame checker. The stream frame error definition includes “Start bit error”, “Stop bit error”, “Stream
length error”, “UART baud rate error”... Each of frame error conditions makes UFMER bit sets as “1” after receiving
pocket.
The UART transfer format includes “Bus idle status”, “Start bit”, “8-bit Data”, “Parity bit” and “Stop bit” as following.
bit0
bit1
bit2
bit3
bit4
bit5
bit6
Start
bit7
Parity
Stop
Idle Status
Idle Status
UART Transfer Format with Parity Bit
Start
Stop
Idle Status
Idle Status
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
UART Transfer Format without Parity Bit
Bus Idle Status
The bus idle status is the bus non-operating status. The UART receiver bus idle status of MCU is floating status and
tied high by the transmitter device terminal. The UART transmitter bus idle status of MCU is high status. The UART bus
will be set when URXEN and UTXEN are enabled.
Start Bit
UART is a asynchronous type of communication and need a attention bit to offer receiver the transfer starting. The start
bit is a simple format which is high to low edge change and the duration is one bit period. The start bit is easily
recognized by the receiver.
8-bit Data
The data format is 8-bit length, and LSB transfers first following start bit. The one bit data duration is the unit of UART
baud rate controlled by register.
Parity Bit
The parity bit purpose is to detect data error condition. It is an extra bit following the data stream. The parity bit includes
odd and even check methods controlled by URXPS/UTXPS bits. After receiving data and parity bit, the parity check
executes automatically. The URXPC bit indicates the parity check result. The parity bit function is controlled by
URXPEN/UTXPEN bits. If the parity bit function is disabled, the UART transfer contents remove the parity bit and the
stop bit follows the data stream directly.
Stop Bit
The stop bit is like start bit using a simple format to indicate the end of UART transfer. The stop bit format is low to high
edge change and the duration is one bit period.
