SN8P2977
8-Bit Micro-Controller with Regulator, PGIA, 24-bit ADC
SONiX TECHNOLOGY CO., LTD
Page 47
Version 1.7
4
4
4
SYSTEM CLOCK
4.1 OVERVIEW
The micro-controller is a dual clock system. There are high-speed clock and low-speed clock. The high-speed clock is
only generated from internal 8MHz high-speed RC oscillator circuit (IHRC 8MHz). The low-speed clock is generated
from internal RC oscillator circuit or external 32768Hz Crystal.
Both the high-speed clock and the low-speed clock can be system clock (Fosc). The system clock in slow mode is
divided by 4 to be the instruction cycle (Fcpu).
Normal Mode (High Clock):
Fcpu = Fhosc / 4 = 2MHz
. (Fhosc= 8MHz IHRC)
Fcpu = Fhosc / 8 = 1MHz.
(Fhosc= 8MHz IHRC)
Fcpu = Fhosc / 16 = 500 kHz.
(Fhosc= 8MHz IHRC)
Fcpu = Fhosc / 32 = 250 kHz.
(Fhosc= 8MHz IHRC)
Slow Mode (Low Clock):
Fcpu = Flosc/4.
(Flosc= ILRC or 32768Hz)
4.2 CLOCK BLOCK DIAGRAM
Fhosc.
Flosc.
Fcpu = Flosc/4
CPUM[1:0]
STPHX
Fosc
Fosc
CLKMD
Fcpu
÷32
÷16
÷8
÷4
Code Option
(High_Clk_Div)
Fhosc: System high clock source is from internal high RC (IHRC).
Flosc: System low clock source is from internal low RC (ILRC) or external 32k.
Fosc: System clock source.
Fcpu: Instruction cycle.