SN8P2977
8-Bit Micro-Controller with Regulator, PGIA, 24-bit ADC
SONiX TECHNOLOGY CO., LTD
Page 49
Version 1.7
4.4 SYSTEM HIGH CLOCK
The system high clock is only from internal 8MHz oscillator RC type (IHRC). The system clock in normal mode is
divided by 4 ,8,16 or 32 controlled by
“High_Clk_Div of code option”, to be the instruction cycle (Fcpu).
4.5 SYSTEM LOW CLOCK
The system low clock source is only from internal RC oscillator (ILRC).The system clock in slow mode is divided by 4
to be the instruction cycle (Fcpu).
The system low clock source is the internal low-speed oscillator built in the micro-controller. The low-speed oscillator
uses RC type oscillator circuit. The frequency is affected by the voltage and temperature of the system. In common
condition, the frequency of the RC oscillator is about 32 KHz at 3.2V. The relation between the RC frequency and
voltage is as the following figure.
The internal low RC supports watchdog clock source and system slow mode controlled by CLKMD.
Flosc = Internal low RC oscillator (about [email protected]).
Slow mode Fcpu = Flosc / 4
The only one condition to stop ILRC is the system into power down mode with watchdog disable or enable. If watchdog
set
“Always_On” and system into power down mode, the ILRC actives well and system will be reset until watchdog
overflow occuring.
Example: Stop internal low-speed oscillator by power down mode.
B0BSET
FCPUM0
; To stop IHRC and ILRC or 32k crystal called power down
mode
; (sleep mode).
Note: The internal low-speed clock can
’t be turned off individually. It is controlled by CPUM0, CPUM) bits
of OSCM register.
