Program instructions
7.6 Counters
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
259
HSC counting mode support
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The compact models support a total of four HSC devices (HSC0, HSC1, HSC2, and
HSC3).
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The SR and ST models support a total of six HSC devices (HSC0, HSC1, HSC2, HSC3,
HSC4, and HSC5).
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HSC0, HSC2, HSC4, and HSC5 support eight counter modes (mode 0, 1, 3, 4, 6, 7, 9,
and 10).
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HSC1 and HSC3 support only one counter mode (mode 0).
Available HSC counter types
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Single-phase clock counter with internal direction control:
–
Mode 0:
–
Mode 1: with external reset
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Single-phase clock counter with external direction control:
–
Mode 3:
–
Mode 4: with external reset
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Two-phase clock counter with 2 clock inputs (clock-up and clock-down):
–
Mode 6:
–
Mode 7: with external reset
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AB quadrature phase counter:
–
Mode 9:
–
Mode 10: with external reset
HSC operating rules
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Before you use a high-speed counter, you must execute the HDEF instruction (High-
Speed Counter Definition) to select a counter mode. Use the first scan memory bit,
SM0.1 (this bit is ON for the first scan and OFF for subsequent scans) to execute HDEF
directly, or call a subroutine that contains the HDEF instruction.
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You can use all counter types with or without a reset input.
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When you activate the reset input, it clears the current value and holds it clear until you
deactivate the reset input.
Reference information
Refer to the following sections for further information:
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High-speed counter programming (Page 264)
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High-speed counter summary (Page 260)
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Example initialization sequences for high-speed counters (Page 277)
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