Mach-DSP User’s Manual
Document Number: MACH-DSP-9021
Page 14
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FB4 protocol (only available in certain Mach-DSP firmware versions)
The FB4 protocol combines both X and Y into a single 32-bit data word, with X being
the most significant 16-bits, and Y being the least significant 16-bits as shown below.
As is the case with XY2-100, signals that are
sent to
the Mach-DSP must change on the
low-to-high transition of the clock; and signals are
observed by
the Mach-DSP on the
high-to-low transitions of the clock. Below is an oscilloscope screen shot showing the
simplest implementation of the FB4 protocol. Yellow is the clock. Pink is data. Blue is
Frame Sync. The numeric data representation is the same as XY2-100. In the picture
below, the most significant bits for both X and Y are high, and the rest of the bits are
low. This repr32768, which is equivalent to the center of the scan field.
Once the Frame Sync has been detected low, it can remain low during the next 31
clocks, or it may be brought high again after the first clock as shown above. In any